[PARISC] Purge existing TLB entries in set_pte_at and ptep_set_wrprotect

This patch goes a long way toward fixing the minifail bug, and
it  significantly improves the stability of SMP machines such as
the rp3440.  When write  protecting a page for COW, we need to
purge the existing translation.  Otherwise, the COW break
doesn't occur as expected because the TLB may still have a stale entry
which allows writes.

[jejb: fix up checkpatch errors]
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Cc: stable@vger.kernel.org
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
[PARISC] hpux: Remove obsolete regs parameter from do_execve() in hpux_execve()

commit da3d4c5fa56236dd924d77ffc4f982356816b93b ("get rid of pt_regs
argument of do_execve()") removed the parameter, but forgot to update
hpux_execve():

arch/parisc/hpux/fs.c: In function 'hpux_execve':
arch/parisc/hpux/fs.c:47:6: error: too many arguments to function 'do_execve'

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Merge tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6 into stable-3.8

PARISC fixes on 20130213

This is a couple of patches, one to fix a broken build with HPUX compatibility
and the other to solve a coherency problem we've been seeing in our TLB where
setting a page read only occasionally fails to trigger a COW because of a
stale writeable TLB entry.

Signed-off-by: James Bottomley <JBottomley@Parallels.com>
parisc: enhance automatic CONFIG_CROSS_COMPILE detection

The current Makefile will only choose the hppa64 cross compiler when
running natively on hppa in a 32bit userspace.
This patch additionally chooses the correct 32/64 bit hppa compiler even
when doing real cross compiling to hppa/hppa64 from another architecture.

Signed-off-by: Helge Deller <deller@gmx.de>
parisc: Fix comment describing setup of access rights in entry.S

This comment describes incredibly subtle code, so it should be right!

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: add CONFIG_MLONGCALLS option to enable linkage of huge vmlinux executables

When building a 64bit kernel which includes all necessary drivers and
filesystems the vmlinux kernel often gets so huge, that the linker won't
be able to resolve the branch stubs. This patch overcomes this limit by
providing an option to compile the kernel with the -mlong-calls compiler
option.

Signed-off-by: Helge Deller <deller@gmx.de>
parisc: fix possible memory leak in pat_query_module()

pa_pdc_cell has been allocated in this function and so should be
freed before leaving from the error handling cases.

spatch with a semantic match is used to found this problem.
(http://coccinelle.lip6.fr/)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Helge Deller <deller@gmx.de>
drivers/parisc: Use printf extension %pR for struct resource

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Helge Deller <deller@gmx.de>
drivers/parisc/pdc_stable.c: use WARN

Use WARN rather than printk followed by WARN_ON(1), for conciseness.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: fixes and cleanups in page cache flushing (1/4)

This is the first patch in a series of 4, with which the page cache flushing of
parisc will gets fixed and enhanced. This even fixes the nasty "minifail" bug
(http://wiki.parisc-linux.org/TestCases?highlight=%28minifail%29) which
prevented parisc to stay an official debian port.  Basically the flush in
copy_user_page together with the TLB patch from commit
7139bc1579901b53db7e898789e916ee2fb52d78 is what fixes the minifail bug.

This patch still uses the TMPALIAS approach.  The new copy_user_page
implementation calls flush_dcache_page_asm to flush the user dcache page
(crucial for minifail fix) via a kernel TMPALIAS mapping.  After that, it just
copies the page using the kernel mapping.  It does a final flush if needed.
Generally it is hard to avoid doing some cache flushes using the kernel mapping
(e.g., copy_to_user_page and copy_from_user_page).

This patch depends on a subsequent change to pacache.S implementing
clear_page_asm and copy_page_asm.  These are optimized routines to clear and
copy a page.  The calls in clear_user_page and copy_user_page could be replaced
by calls to memset and memcpy, respectively.  I tested prefetch optimizations
in clear_page_asm and copy_page_asm but didn't see any significant performance
improvement on rp3440.  I'm not sure if these are routines are significantly
faster than memset and/or memcpy, but they are there for further performance
evaluation.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: fixes and cleanups in page cache flushing (2/4)

Implement clear_page_asm and copy_page_asm. These are optimized routines to
clear and copy a page.  I tested prefetch optimizations in clear_page_asm and
copy_page_asm but didn't see any significant performance improvement on rp3440.
I'm not sure if these are routines are significantly faster than memset and/or
memcpy, but they are there for further performance evaluation.

TLB purge operations on PA 1.X SMP machines are now serialized with the help of
the new tlb_lock() and tlb_unlock() macros, since on some PA-RISC machines, TLB
purges need to be serialized in software.  Obviously, lock isn't needed in UP
kernels.  On PA 2.0 machines, there is a local TLB instruction which is much
less disruptive to the memory subsystem.  No lock is needed for local purge.

Loops are also unrolled in flush_instruction_cache_local and
flush_data_cache_local.

The implementation of what used to be copy_user_page (now copy_user_page_asm)
is now fixed. Additionally 64-bit support is now added. Read the preceding
comment which I didn't change.  I left the comment but it is now inaccurate.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: fixes and cleanups in page cache flushing (3/4)

flush_cache_mm, for the non current case also uses flush_dcache_page_asm
and flush_icache_page_asm which are TMPALIAS flushes.

For the non current case, the algorithm used by get_ptep is derived from the
vmalloc_to_page implementation in vmalloc.c.  It is essentially a generic page
table lookup.  The other alternative was to duplicate the lookup in entry.S.
The break point for switching to a full cache flush is somewhat arbitrary.  The
same approach is used in flush_cache_range for non current case.  In a GCC
build and check, many small programs are executed and this change provided a
significant performance enhancement, e.g. GCC build time was cut almost in half
on a rp3440 at j4.  Previously, we always flushed the entire cache.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: fixes and cleanups in page cache flushing (4/4)

CONFIG_PARISC_TMPALIAS enables clear_user_highpage and copy_user_highpage.
These are essentially alternative implementations of clear_user_page and
copy_user_page.  They don't have anything to do with x86 high pages, but they
build on the infrastructure to save a few instructions.  Read the comment in
clear_user_highpage as it is very important to the implementation.  For this
reason, there isn't any gain in using the TMPALIAS/highpage approach.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: remove IRQF_DISABLED

People are playing odd games with IRQF_DISABLED, remove it.

Its not reliable, since shared interrupt lines could disable it for you,
and its possible and allowed for archs to disable IRQs to limit IRQ nesting.

Therefore, simply mandate that _ALL_ IRQ handlers are run with IRQs disabled.

[ This _should_ not break anything, since we've mandated that IRQ handlers
  _must_ be able to deal with this for a _long_ time ]

IRQ handlers should be fast, no if buts and any other exceptions. We also have
plenty instrumentation to find any offending IRQ latency sources.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: disable preemption while flushing D- or I-caches through TMPALIAS region

It is necessary to disable preemption during cache flushes done through the
TMPALIAS region to ensure that the TLB setup is not clobbered by another flush.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: ensure that mmapped shared pages are aligned at SHMLBA addresses

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: always detect multiple physical ranges

This patch unbreaks the current logic in that way, that even if
CONFIG_DISCONTIGMEM isn't set, the user may be informed, that he should turn on
CONFIG_DISCONTIGMEM for his machine.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: fix ptrace breakage

1) PTRACE_SYSCALL doesn't work for 64bit process on parisc64.
Compat syscall table is used instead of 64bit one.  IMO we should either
refuse to allow PTRACE_SYSCALL for 64bit processes or duplicate the
logics choosing the right syscall table into .Ltracesys.

	2) if you have let the tracee run with PTRACE_SYSCALL and
it had stopped, you can use PTRACE_POKEUSR to modify syscall number
(r20) and arguments 1--4 (r26--r23).  Modifications will have effect.
However, modifying arguments 5 and 6 (r22 and r21 resp.) works only
when process (32bit one) runs on 64bit host - on 32bit one it has no
effect.  AFAICS, the diff below should fix that one.

Signed-off-by: Al Viro <viro@ZenIV.linux.org.uk>
Tested-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: space register variables need to be in native length (unsigned long)

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
parisc/mm/fault.c: Port OOM changes to do_page_fault

Commit d065bd810b6deb67d4897a14bfe21f8eb526ba99
(mm: retry page fault when blocking on disk transfer) and
commit 37b23e0525d393d48a7d59f870b3bc061a30ccdb
(x86,mm: make pagefault killable)

The above commits introduced changes into the x86 pagefault handler
for making the page fault handler retryable as well as killable.

These changes reduce the mmap_sem hold time, which is crucial
during OOM killer invocation.

Port these changes to parisc.

Signed-off-by: Kautuk Consul <consul.kautuk@gmail.com>
Signed-off-by: Helge Deller <deller@gmx.de>