fix handling of MUX5 bit in ADC channels

There is a bug in tos/chips/atm128rfa1/adc/HplAtm128AdcP.nc with ADC channels that use MUX5 bit. As stated in version 8266D-MCU of the atmega128rfa1 datasheet, section 27.6.1, bit MUX5 is buffered and only written on a consecutive write to MUX4:0. Therefore, need to write MUX5 first, then MUX4:0.

Also fixed a small bug when reading the channel. MUX5 bit was used as such ((ADCSRB & MUX5) but should be ((ADCSRB & (1<<MUX5)).