Allow different clocks for slave+master interface
crossbar: eliminate lexically nested functions

According to Peter Jansweijer, Precision and Questasim had trouble
synthesizing the crossbar HDL. After tracking the problem down via
email, it appears that these tools cannot handle nested functions
correctly; they crash or fail when trying to access the parameters
of the lexically enclosing function.

Therefore, this patch just outright removes all nested functions.
all: Regenerate Wishbone interfaces
gc_reset: asynchronously clear the counter

In case the free_clk itself is not running when the lock is lost,
still reset the other clock domains.
wishbone/wb_lm32/*: add bscan component for virtex6
Merge remote-tracking branch 'upstream/master'

conflicts: modules/wishbone/wishbone_pkg.vhd