cache: fix first read from the end of a line during line-fill.

Otherwise we were returning stale data from the old cache line.
cache: use the correct index.

We want to read using the address index rather than the control index.
rtl/cache: help quartus with inferring the tag ram.

Otherwise it implements it with registers which is expensive.  The
previous construct was valid but Quartus wouldn't always infer the ram,
somehow detecting asynchronous read logic.
rtl/cache: help Quartus infer main cache memory as a RAM.