[x86] Rearranged code for interrupt registration.

Rearragned the interrupt code to align more with
host IRQ subsystem. External interrupts are by
default mapped to the CPU vectors. The drivers
register based on the external IRQ number and
they don't need to bother about IOAPIC pin routing.

Register fast EOI as the IRQ handler for APIC.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>