Fix scheduling for vldm/vstm instructions that load/store more than 32 bytes on Cortex-A9. This also makes the existing code more compact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189958 91177308-0d34-0410-b5e6-96231b3b80d8
Swift: Only build vldm/vstm with q register aligned register lists

Unaligned vldm/vstm need more uops and therefore are slower in general on swift.

radar://14522102

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189961 91177308-0d34-0410-b5e6-96231b3b80d8
Rename variables to match the style guide and clang-format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189962 91177308-0d34-0410-b5e6-96231b3b80d8