msm_fb: display: Do clock control within mdp4_hw_init

Since mdp4_hw_init() access mdp registers, mdp clock control
within mdp4_hw_init() is necessary.

CRs-fixed: 455506
Change-Id: I768f468314fc920029b4c88e49ef6a74f6b74f58
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: display: Configure solidfill color to black

The solidfill color was getting reset to to default state to white.
Correctly reseting to black by default.

Crs-Fixed: 453600
Change-Id: I203ce61867d009509bf6acd01169f1fb0b223652
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm: display: reset vsync state when display is turned on

In the case that vsync ctrl is unbalanced, vsync IRQ is cleared
in suspend,  vsync cannot be enabled after resume.
Clear the status when display is turned on

CRs-fixed: 449155
Change-Id: I5ecf23053b60d1fbd91f042758d67d39c83ab444
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
msm_fb : Add timeout while waiting for vsync event

Avoid eternal wait for vsync event when client tries to
read the corresponding sysfs entry. This will avoid hangs when
client tries to read in corner cases where the Timing
Generator or the clock or IRQ gets disabled.

CRs-fixed: 406752
Change-Id: I773687220b868823a9e4bfdae74361ee6487c5c6
Signed-off-by: Pradeep Jilagam <pjilagam@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>