msm: camera: Fix for inverted preview with front camera in 8930
             fluid device.

             Changed mount angle for front sensor(mt9m114) in 8930
             fluid from 90 to 270.

Change-Id: I47b7b211507963a1c25e67cb5b6131b3143ba349

Signed-off-by: Sai Kumar Sanagavarapu <ssanagav@codeaurora.org>
msm: camera: Fix flash issue timeout

Add timer and refresh logic for flash to work
in torch mode until user changes flash stae.

Change-Id: I9f6e5fb8de60015d354234c65fd0e53733bcb4f5
Signed-off-by: Suresh Vankadara <svankada@codeaurora.org>
msm: display: provide mdp bandwidth parameters from board file

Underrun issues can be solved by changing mdp bandwidth parameters:
max_bw, ab_factor and ib_factor. However these parameters are not
universally same for all targets, and one set of values that works for
one target could cause underruns or higher power on other
targets. This is board side change.

CRs-Fixed: 464492
Change-Id: I2a8fbb9018011ddf42dfa50b371e450e38f4351a
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm_fb: display: get mdp bandwidth parameters from board file

Underrun issues can be solved by changing mdp bandwidth parameters:
max_bw, ab_factor and ib_factor. However these parameters are not
universally same for all targets, and one set of values that works for
one target could cause underruns or higher power on other
targets. This change is driver change which makes those parameters
target dependent.

CRs-Fixed: 464492
Change-Id: Ib23ebc431caabbe91c7ae3bd96bb38789d7ddc90
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm: kgsl: pwrscale functions should be run while GPU is ACTIVE

Base the decision to call power scaling functions on the current
state, not the requested state.  The GPU may not transition to the
requested state; call through based on current GPU state instead.

Change-Id: I1524bc92c908dc50a60b5815f2221ae3feef59be
CRs-Fixed: 441847
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
msm: kgsl: Properly record the size of the sglist in the memdesc

It was possible to fail out of kgsl_sharedmem_alloc after a sglist was
allocated but before we saved the size of the allocation which caused
problems when the sglist was freed during cleanup.

CRs-fixed: 464289
Change-Id: Ic0dedbadd57ec4d9422b5e3a873243d0ffed51f7
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
mmc: sdio: print correct UHS mode during card detection

When SDIO3.0 card is detected, incorrect bus speed mode
is printed as part of card detection print in kernel logs.

This change fixes it so that user won't be confused by
looking at incorrect card detection message in logs.

CRs-Fixed: 424685
Change-Id: I06c318895aa17879a4d4ad8c263e46fbfdce7d3b
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
mmc: sdio: fix sdio_reset_comm() to take care of UHS card reset

sdio_reset_comm() function may be invoked by the SDIO card function
driver to execute soft reset of the card but this function currently
fails to reset the UHS SDIO cards.

This change fixes this issue by simply invoking SDIO power restore
function which is capable of resetting both UHS and non-UHS SDIO cards.

CRs-Fixed: 424685
Change-Id: I4f1d76a6bfc4bfec16661aedba85c45b601f24ac
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
mmc: msm_sdcc: data timeout errors are expected during HS200 tuning

HS200 bus speed mode requires DLL (Delay locked loop) HW block to be
tuned as clock rate (192 MHz) is greater than 100MHz.

While tuning the DLL block by sending CMD21 for different DLL phases,
it is quite possible that few CMD21 may fail with data CRC/timeout
errors as clock phase is not correct but these errors are not really
worth to be printed out as kernel messages. This change doesn't allow
these errors to be printed.

CRs-Fixed: 401743
Change-Id: I2b465a8e1d52458e8663d48791083be7fa4131b2
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>

Conflicts:

	drivers/mmc/host/msm_sdcc.c

Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
mmc: msm_sdcc: perform DLL retuning if clock rate is changed

Using HS200/SDR104 bus speed mode requires DLL (Delay Locked
Loop for sampling clock generation) HW block to be tuned if
clock rate is >100MHz so that both host and card are in sync.

During card initialization, driver uses the tuning command to
search for an optimal sampling point and then programs the
DLL HW with this optimal sampling point.

But if MMC core layer switches the clock frequency to <100MHz
(when HS200/SDR104 timing mode is set) and then increases it
back to >100MHz without calling execute_tuning host ops,
DLL may go to unlocked state. So this change makes sure
that execute_tuning is performed explicitly if clock frequency
switch happens without execute_tuning.

CRs-Fixed: 424685
Change-Id: I19ee19965ca5b6a73a09f9332d34b56602051ebd
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>

Conflicts:

	drivers/mmc/host/msm_sdcc.c
	drivers/mmc/host/msm_sdcc.h

Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
tspp: fix tspp_close_channel to clean channel filters

Fix tspp_close_channel to clean all relevant channel filters from both
filter tables, regardless of channel source.

Change-Id: I4f725f4ea8d3cf45ebb46b338d54bd346893c310
CRs-Fixed: 468184
Signed-off-by: Liron Kuch <lkuch@codeaurora.org>
WIFI: Enable clock 19.2MHz for qrd8930

This change would set the has48MHz variable to '0' if
the device is QRD so that the QRD device would use
19.2 MHz clock as there is no support for 48 MHz by
default on the QRD device.

Change-Id: Id9f5b1ad977ce2af1b95c0476d95210534b4fb5e
Signed-off-by: rockiec <rockiec@codeaurora.org>
Signed-off-by: Deepthi Gowri <deepthi@codeaurora.org>
rpm_log: update the rpm log base address and log length

Rpm log base address is changed for 8930, update the new adress
in device file.
Log length is increased for 8960 and 8064, update the log
length in device file.

CRs-fixed: 460541
Change-Id: I4eb86c1ad421530494b6c0356a379f3afc1d2bce
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
msm: display: vsync usage in turning off dsi video

Add timeout to waiting for vsync so that it can come out
when vsync interrupt is not working.
Need not wait for vsync after timing engine is off.

CRs-Fixed: 458419

Change-Id: Ib989e435405613d891024ba15144723730454e34
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
msm_fb: display: fix iommu page fault when iommu buffer freed

There has possibility that pipe commit come very close to next vsync.
This may cause two consecutive pipe_commits happen within same vsync
period which cause iommu page fault when previous iommu buffer is
freed since mdp stil fetching it. Set ION_IOMMU_UNMAP_DELAYED flag
at ion_map_iommu() to add delay un mapping iommu buffer to fix this problem.
Otherwise four buffer mechanism is needed to avoid this problem..
Also ion_unmap_iommu() may take long time to free an ion buffer. Move
mdp4_overlay_iommu_unmap_freelist(mixer) called after stage_commit()
to increase chance to have pipe_commit (up to stage_commit) is completed
within same vsync period
This patch also fix an potential race condition at wait_for_completion
between show_event thread and wait4vsync thread.

Change-Id: I089950ac61c0bd3c4207b8925817577e42fbb258
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_fb: display: silent blending error warning message

If there had no any pipe blending stage changes, then do not
call belnding set up to avoid unnecessary warning messges.

CRs-fixed: 467556
Change-Id: I07520b3b0917375c41405e736dcb9eb8a3daddc1
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
asoc: msm: Add flexible period count to pcm record driver

 In pcm recording, if buffers are not requested from dsp at real
 time then dsp drops the buffers and sends partial buffers. This
 is causing record failures. Pcm record platform driver has two
 periods. If system is loaded, read request will not be at real
 time. Add flexible period count to pcm record platform driver
 so client can configure the period count.

CRs-Fixed: 467746
Change-Id: Iadd47979f7b29a01fb8e6479383094a2ed1d93c5
Signed-off-by: Krishnankutty Kolathappilly <kkolat@codeaurora.org>
Revert "msm_fb: display: remove background invert alpha option for alpha drop pipe"

This reverts commit 0119007a18aae8a8fb43f4320509bda161da4167.

CRs-fixed: 461574
Change-Id: Ia768030ec859a4ff38549686936789413826df32
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: display: prepare clocks before enable AHB clock

Clocks need to be prepared before enabled and unprepared after
clock disabled.

CRs-fixed: 466843
Change-Id: I5180c98a2c5fd4bd867272ee1d2bf274ff15d215
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
defconfig: msm8960: Enable IPC Router Security feature

This feature will enforce the security policies as configured by the
user-space security script.

Change-Id: I641df5b996c7774c1a1c96bc554846360f2863a3
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>