Fix PPC64 64-bit GPR inline asm constraint matching

Internally, the PowerPC backend names the 32-bit GPRs R[0-9]+, and names the
64-bit parent GPRs X[0-9]+. When matching inline assembly constraints with
explicit register names, on PPC64 when an i64 MVT has been requested, we need
to follow gcc's convention of using r[0-9]+ to refer to the 64-bit (parent)
registers.

At some point, we'll probably want to arrange things so that the generic code
in TargetLowering uses the AsmName fields declared in *RegisterInfo.td in order
to match these inline asm register constraints. If we do that, this change can
be reverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187693 91177308-0d34-0410-b5e6-96231b3b80d8
Stop leaking register infos in the disassemblers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187695 91177308-0d34-0410-b5e6-96231b3b80d8
ARMAsmParser: Plug a leak.

Using an object to do the cleanup may look like overkill, but it's safer and nicer than putting deletes everywhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187696 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-rtdyld: Don't leak memory managers.

Dyld never outlives MemMgr, just put both on the stack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187697 91177308-0d34-0410-b5e6-96231b3b80d8
MachObjectFile: Don't leak on error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187698 91177308-0d34-0410-b5e6-96231b3b80d8
Unbreak llvm-rtdyld build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187699 91177308-0d34-0410-b5e6-96231b3b80d8
PPCAsmParser: Stop leaking names.

Store them in a place that gets cleaned up properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187700 91177308-0d34-0410-b5e6-96231b3b80d8
Clean up code for Mips16 large frame handling.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187701 91177308-0d34-0410-b5e6-96231b3b80d8
AsmParser: Store MacroLikeBodies on the side so they don't get leaked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187702 91177308-0d34-0410-b5e6-96231b3b80d8
X86: correct tail return address calculation

Due to the weird and wondeful usual arithmetic conversions, some
calculations involving negative values were getting performed in
uint32_t and then promoted to int64_t, which is really not a good
idea.

Patch by Katsuhiro Ueno.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187703 91177308-0d34-0410-b5e6-96231b3b80d8
X86: specify CPU on new test to fix atom buildbot

Apparently Atoms use lea for stack adjustment, which we weren't
looking for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187704 91177308-0d34-0410-b5e6-96231b3b80d8
AVX-512 set: added VEXTRACTPS instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187705 91177308-0d34-0410-b5e6-96231b3b80d8
X86: Turn fp selects into mask operations.

double test(double a, double b, double c, double d) { return a<b ? c : d; }

before:
_test:
	ucomisd	%xmm0, %xmm1
	ja	LBB0_2
	movaps	%xmm3, %xmm2
LBB0_2:
	movaps	%xmm2, %xmm0

after:
_test:
	cmpltsd	%xmm1, %xmm0
	andpd	%xmm0, %xmm2
	andnpd	%xmm3, %xmm0
	orpd	%xmm2, %xmm0

Small speedup on Benchmarks/SmallPT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187706 91177308-0d34-0410-b5e6-96231b3b80d8
Build with the $RDYNAMIC flag on Darwin as well as other platforms.

Part of <rdar://problem/14620988>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187710 91177308-0d34-0410-b5e6-96231b3b80d8
Remove "lto_on_osx" xfails, now that -rdynamic works on Darwin.

Note that this will require a recent version of the linker for Darwin
builds with LTO to pass these tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187711 91177308-0d34-0410-b5e6-96231b3b80d8
Add the saving of S2. This is needed for some of the floating point
helper functions. This can be optimized out later when the remaining
parts of the helper function work is moved into the Mips16HardFloat pass.
For now it forces us to use the 32 bit save/restore instructions instead
of the 16 bit ones.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187712 91177308-0d34-0410-b5e6-96231b3b80d8
Update the docs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187713 91177308-0d34-0410-b5e6-96231b3b80d8
Update the release notes about the status of the vectorizers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187714 91177308-0d34-0410-b5e6-96231b3b80d8
AVX-512 set: added mask operations, lowering BUILD_VECTOR for i1 vector types.
Added intrinsics and tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187717 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Split out comparison elimination into a separate pass

Perhaps predictably, doing comparison elimination on the fly during
SystemZLongBranch turned out to be a bad idea.  The next patches make
use of LOAD AND TEST and BRANCH ON COUNT, both of which require
changes to earlier instructions.

No functionality change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187718 91177308-0d34-0410-b5e6-96231b3b80d8