msm: pm: Add support to query cpu status

During hotplug operation primary core is required to query
cpu registers to determine whether secondary core has
successfully shutdown.

Change-Id: I81bd47ba851698e86269652afe381b0571ca912a
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
jf: Add sleep status device

Change-Id: Ie3a28f36bcdaf0b89d20776e9fba3cbd11813a7d
msm: pm: Add support for retention on each core

Allow each core on 8974 to enter retention and retain
the state of the CPU. On 8960 as hardware restriction does
not permit all cores to enter retention at the same time,
allow only core 0 to enter retention when all other cores
are offline to maintain backward compatibility.

CRs-fixed: 437281
Change-Id: I6690e901afc9fa3a27010c264fa3acc9a0722c1a
Signed-off-by: Priyanka Mathur <pmathur@codeaurora.org>
Signed-off-by: Venkat Devarasetty <vdevaras@codeaurora.org>
msm: pm-8x60: Setup memory for save/restore cpu registers early

Cores can be offlined early in the boot cycle by certain kernel
drivers.
Ensure that the memory to save and restore the cpu registers is
ready and available early during the boot procedure.

CRs-Fixed: 460083
Change-Id: I925372f066386ceb1e85184d4c58863835c3e88e
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
msm: hotplug: wait for hotplug completion event from secondary core

Primary core has to wait for hotplug completion event from secondary
core to avoid race between ongoing hotplug and already queued online
event. This also prevent CPU_DEAD notifiers from executing before the
SPM has completed the collapse of the CPU. CPU DEAD notifiers executing
early have been attributed to MDD hardware block for the CPU being
turned off prematurely, resulting in crashes.
The patch also adds support for probing with device tree for 8974
targets.

Change-Id: Ibd35a7c56f42f156a643ca6d531509f019b2a3be
CRs-fixed: 438314
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
msm: avs: Restore core voltage when disabling AVS

AVS changes the core voltage to match the current operating conditions
on the part. Not all frequencies supported by the target have characterized
AVS delay synthesizer (AVSDSCR) values. For frequencies that do not have
AVSDSCR set, AVS is not enabled and so need to operate at the
characterized voltage for that frequency. Disabling AVS does not
however, restore the operating voltage to the value the rail was
configured to. This may cause frequencies that do not have AVSDSCR to
run at lower voltage than prescibed.
Set up the core voltage back to the last known good value when disabling
AVS.

Change-Id: I5389996288fa49e45c469d2a8917e00900261de7
CRs-fixed: 457772
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
board-8960: Update 8960AB and 8064AB SPM sequences.

8960AB and 8064AB have a new revision of the Krait SPM hardware.
The SPM v1.15x on these targets uses a different bit to control the
apc_pdn signal.
Update the SPM sequences for standalone and power collapse to use the
new sequences.
L2 SPM or Krait WFI/Retention sequences are not affected.

CRs-fixed: 419258
Change-Id: I3bcf335ac50cd1181047fe1ee1d56ecd507ae35c
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
msm: pm: Update spm retention sequence to support per core retention

On krait revision < 3, power driver is not using full spm sequence and
calling into trustzone as a part of executing krait retention.
Also krait retention is not supported on secondary cores.

krait pass3 is upgraded to use full spm sequence, hence add support
for per core retention and avoid calling into trustzone
while executing retention.

CRs-fixed: 437281
Change-Id: I6a2b3d7c4d0fd5b9a340957b16b940b7a09bbd91
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
Signed-off-by: Venkat Devarasetty <vdevaras@codeaurora.org>
jf: Update spm retention sequence to support per core retention

 * Merge SPM retention sequence change to JF boards to enable per-core
   retention mode.

Change-Id: I2a7d4af749201e0b76670f3dde1e4050f75936dc
msm: msm_bus: Change MDP port interleaved setting

When display driver requests bandwidth on MDP port 0, it was
automatically divided between port 0 and port 1 by the bus driver
as a part of interleaving. Since MDP port 1 was never used,
this did not have any impact.

Now, the display driver needs to use MDP port 1 such that MDP
ports should be able to use the bandwidth non-uniformally.
To enable these ports to use unequal amount of bandwidth,
it is required that bus driver does not divide bandwidth
between port 0 and port 1.
The display team is now responsible for requesting bandwidth
explicitly on both ports.

CRs-Fixed: 474499
Change-Id: I826a4c20a113a32f6d6bcf13f1c6474040f35f46
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
(cherry-pick from Change-Id: I826a4c20a113a32f6d6bcf13f1c6474040f35f46)
msm: msm_bus: Fix the 64-bit division during interleaving

When interleaving flag is enabled, the bandwidth is divided
between ports. There was an error in the division as the
macro was not correctly updated with the right order of using
bandwidth and port number when 64-bit division function
was used by the bus driver.
Correcting this for fixing the token allocation issues
observed.

CRs-Fixed: 472791
Change-Id: Ie7c7f9557006cbb946eaa9eff4b50771cc60525e
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
msm: pm-data: Enable powercollapse/suspend_enabled for non-boot cpus

Allow non-boot cpus to be hotplugged and power collapsed by default.
This facilitates the cores to be offlined by kernel drivers during the
boot process.

CRs-Fixed: 460083
Change-Id: If44b6b594504dab61dff662c581b60e6fb664936
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>