OMAP4: DSS: Implement workaround for Errata ID:i733.

Description of Errata i733:
Due to wrong timings, all register accesses transitioning through the L4
interconnect toward DSS are not reliable.

Workaround:
DSS register access should be addressed through the L3 interconnect.

This change fixes errata by using L3 for access to DSS in dss_hwmod
instead of L4.

Silicon Versions Impacted:
OMAP4430 ES1.0, ES2.0, ES2.1, ES2.2, ES2.3
OMAP4460 ES1.0, ES1.1
OMAP4470 ES1.0

Change-Id: Ie087b861ee653a3beeacba74c3afe7b1a0490ed4
Co-author: Raghuveer Murthy <raghuveer.murthy@ti.com>
Signed-off-by: Mykhailo Denysiuk <x0172934@ti.com>
ion: convert system heap to alloc_page()

vmalloc() allocates pages and maps them into kernel space.  If nobody
requires the area to be mapped in kernel space, this uses potentially
valuable VM address space.  Split into separate allocation and mapping
of pages.

Change-Id: I98411b93edea67c2068e20b5e48708fb38a4cd1f
Signed-off-by: David Schleef <ds@ti.com>
Fixed fsync control not showing up in ext version
Revert "ion: convert system heap to alloc_page()"

This reverts commit 28d58c3a5a6996ad640c36c1757b1fafbece492e.
board-tuna-wifi.c: add Imoseyon's random MAC ID bug that plagues some users. Also decrease startup_delay of the wifi interface from 70ms to 25ms (testing).
ARM: OMAP4: EMIF: implementation of errata i735 for PM timer

EMIF Power Management timer for Self Refresh will put the external SDRAM
in Self Refresh mode after the EMIF is idle for number of DDR clock cycles
that is set with REG_SR_TIM. The minimal value starts at 16 cycles.
However due to Errata i735, the minimal value is 512 DDR cycles as it is
required at OPP100 frequency.

Change-Id: If0748903580877aa4c1803f47e9134ee60c1dd75
Signed-off-by: Konstantyn Shlyakhovoy <x0155534@ti.com>

Conflicts:
	arch/arm/mach-omap2/emif.c