i2ctest can receive 1 - N bytes now

Arbitrary number of bytes can be received by i2ctest (tested only with 1 or 2).
The possible stop bit is detected during the clock cycle of first bit
after the correct chip address has been received and acknowledged.
Use subroutines for postive/negative acknowledgement from slave. Improves
readibility but adds 2+2 us latency. Define timeout of 288 ms after which
the system resets.