svga: remove unneeded include of u_double_list.h
gallium: new, unified pipe_context::set_sampler_views() function

The new function replaces four old functions: set_fragment/vertex/
geometry/compute_sampler_views().

Note: at this time, it's expected that the 'start' parameter will
always be zero.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
radeonsi: remove unused si_set_cs_sampler_view()

Fixes build breakage.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70804

Tested-by: Vinson Lee <vlee@freedesktop.org>
nv50: clamp PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS to PIPE_MAX_SAMPLERS

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70212
Tested-by: Aaron Watry <awatry@gmail.com>
clover: fix build after a3ed98f7aa85636579a5696bf036ec13e5c9104a
i965: Fix texture buffer rendering after a whole buffer replacement.

If glBufferData(), glBufferSubData(0, obj->Size), or similar happens, we
get a new drm_intel_bo for the buffer object, and thus need to re-upload
texture buffer state so we point at the new data.

Fixes the new piglit GL_ARB_texture_buffer_object/data-sync

Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
i965: Drop intel_bufferobj_source().

Since src_offset was always 0, it wasn't doing anything for us beyond
intel_bufferobj_buffer().

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
i965: Add a note about the late-allocation in intel_bufferobj_buffer().

This was mostly for the i915 system-memory VBO code, which we don't have
any more, but since that existed we've ended up producing dependencies on
it being there.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
i965: Add support for GL_ARB_texture_buffer_range.

Supporting this extension turns out to simplify our code a bit over not
supporting this extension, once the glBufferSubData() synchronization code
lands.

v2: Use 16 byte alignment like we do for uniform buffers, due to unaligned
    access penalties.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v1)
i965: Be sure to reset brw->vb.buffers[] when trying to redo vertex setup.

The brw_prepare_vertices that sets up buffers[] depends on these
parameters, so don't let brw_prepare_vertices() skip it.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
i965: Try to avoid stalls on the GPU when doing glBufferSubData().

On DOTA2, framerate on dota2-de1.dem in windowed mode on my laptop
improves by 7.69854% +/- 0.909163% (n=3).  In a microbenchmark hitting
this code path (wall time of piglit vbo-subdata-many), runtime decreases
from 0.8 to 0.05 seconds.

v2: Use out of range start/end instead of separate bool for the active
    flag (suggestion by Jordan), fix double-upload in the stalling path.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
i965: Add perf debug hint when the app makes us do index buffer scanning.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
glsl/gs: Prevent illegal input/output primitive types.

From the GLSL 1.50 spec, section 4.3.8.1 (Input Layout Qualifiers):

    The layout qualifier identifiers for geometry shader inputs are

        layout-qualifier-id
            points
            lines
            lines_adjacency
            triangles
            triangles_adjacency

And from section 4.3.8.2 (Output Layout Qualifiers)

    The layout qualifier identifiers for geometry shader outputs are

        layout-qualifier-id
            points
            line_strip
            triangle_strip
            max_vertices = integer-constant

We were erroneously allowing line_strip and triangle_strip to be used
as input qualifiers, and we were allowing lines, lines_adjacency,
triangles, and triangles_adjacency to be used as output qualifiers.

Fixes piglit tests "glsl-1.50-gs-{input,output}-layout-qualifiers *".

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
i965/fs: Only unroll high-accuracy dFdy() from SIMD16 to SIMD8 on gen4 and IVB.

In commit 800610f (i965/fs: Improve accuracy of dFdy() to match
dFdx()) I unrolled the high-accuracy dFdy() computation from a single
SIMD16 instruction to two SIMD8 instructions because of text I found
in the i965 (gen4) PRM saying that instruction compression could not
be used in align16 mode.  I couldn't find similar text in later
hardware docs, and I observed problems trying to use instruction
compression on align16 mode on Ivy Bridge, so I assumed that the
restriction still applied and the associated documentation had simply
been lost.

After consultation with the hardware engineers, it turns out this is
not the case.  In point of fact, the restriction was dropped in gen5,
re-introduced in Ivy Bridge, and dropped again in Haswell.  The reason
I didn't notice this is that in the Ivy Bridge documentation, the
restriction was in a different section, and described using different
language.

Now that we know that the restriction only applies to Gen4 and Ivy
Bridge, we can limit the unrolling to those platforms.

Tested on gen5, gen6, and gen7 (both Ivy Bridge and Haswell).

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
freedreno: fix compile error

Small typo introduced in a3ed98f.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
i965: Fix glTexImage when packing alignment != cpp

Fixes texture corruption of Weston clients on cairo-glesv2 backend.
Commit 49ed599 introduced the bug.

Corruption occured when glTexSubImage called
intel_texsubimage_tiled_memcpy() with:
  x,y=10,9
  w,h=7,7
  format=GL_ALPHA(0x1906)
  type=GL_UNSIGNED_BYTE(0x1401)
  gl_format=MESA_FORMAT_A8(0x18)
  packing.alignemnt=4

The function miscalculated the source image's stride as w*cpp=7 without
taking into account the packing alignment. The actual stride was 8.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70435
Reported-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Tested-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by:Frank Henigman <fjhenigman@google.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
i965: Print more debuginfo in intel_texsubimage_memcpy()

Print info about packing, format, type, and tiling. This will help debug
future issues with this fastpath.

Reviewed-by: Frank Henigman <fjhenigman@google.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
svga: remove user-space vertex/index buffer code

The gallium vbuf module, which we've been using for some time now, takes
care of uploading user-space vertex/index data into real buffers.  The
upload code in the svga driver was unused.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
glsl: silence unused 'var' variable warning

Reviewed-by: Paul Berry <stereotype441@gmail.com>
clover: Query maximum kernel block size from the device instead of the kernel object.

Based on a similar fix from Aaron Watry.  It seems unlikely that we
will ever need a kernel-specific setting for this, and the Gallium API
doesn't support it.  Remove kernel::max_block_size() altogether.