ARM: OMAP2+: AM33XX: control: Add some control module registers and APIs

Interacting with WKUP-M3 requires some more control
module register writes. Add the register offsets and
APIs to write to these.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
ARM: OMAP: AM33XX: PM: Add support for VTT Toggle

Some boards provide s/w control via GPIO over the VTT regulator
to reduce power consumption in low power state.

This VTT regulator should be disabled after enabling self-refresh
on suspend, and should be enabled before disabling self-refresh
on resume. This is to allow proper self refresh entry/exit commands
to be transmitted to the memory

This patch adds DT bindings to enable passing on this
board specific details (GPIO0 pin used for VTT Toggle)
to the AM335x PM code.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
ARM: dts: AM33XX: EVM-SK: Add support for VTT Toggle

Due to a Hardware related issue, Suspend-Resume causes a hangs on
EVM-SK board.

On EVM-SK, the CKE signal does not go low properly during DDR self
refresh. The pull down enabled on CKE is a weak pull down, which is not
enough to overcome the VTT pull up to 0.75V.  Thus, the DDR never
properly goes to self refresh. CKE needs to be pulled down to keep the
DDR in Self refresh.

EVM-SK (Rev 1.2) has an added external pull down on CKE and the ability
to disable VTT regulator via gpio to address the above issues.

AM335x PM code provides an option to toggle VTT which can be enabled
through DT.

Add necessary DT nodes to toggle VTT on EVM-SK board.
Also, add the required pin-mux setup for the gpio pins.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>

Conflicts:
	arch/arm/boot/dts/am335x-evmsk.dts
ARM: OMAP2+: AM33XX: Add assembly code for PM operations

In preparation for suspend-resume support for AM33XX, add
the assembly file with the code which is copied to internal
memory (OCMC RAM) during bootup and runs from there.

As part of the low power entry (DeepSleep0 mode in AM33XX TRM),
the code running from OCMC RAM does the following
1. Stores the EMIF configuration
2. Puts external memory in self-refresh
3. Disables EMIF clock
4. Executes WFI after writing to MPU_CLKCTRL register.

If no interrupts have come, WFI execution on MPU gets registered
as an interrupt with the WKUP-M3. WKUP-M3 takes care of disabling
some clocks which MPU should not (L3, L4, OCMC RAM etc) and takes
care of clockdomain and powerdomain transitions as part of the
DeepSleep0 mode entry.

In case a late interrupt comes in, WFI ends up as a NOP and MPU
continues execution from internal memory. The 'abort path' code
undoes whatever was done as part of the low power entry and indicates
a suspend failure by passing a non-zero value to the cpu_resume routine.

The 'resume path' code is similar to the 'abort path' with the key
difference of MMU being enabled in the 'abort path' but being
disabled in the 'resume path' due to MPU getting powered off.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
ARM: OMAP2+: AM33XX: Basic suspend resume support

AM335x supports various low power modes as documented
in section 8.1.4.3 of the AM335x TRM which is available
@ http://www.ti.com/litv/pdf/spruh73f

DeepSleep0 mode offers the lowest power mode with limited
wakeup sources without a system reboot and is mapped as
the suspend state in the kernel. In this state, MPU and
PER domains are turned off with the internal RAM held in
retention to facilitate resume process. As part of the boot
process, the assembly code is copied over to OCMCRAM using
the OMAP SRAM code.

AM335x has a Cortex-M3 (WKUP_M3) which assists the MPU
in DeepSleep0 entry and exit. WKUP_M3 takes care of the
clockdomain and powerdomain transitions based on the
intended low power state. MPU needs to load the appropriate
WKUP_M3 binary onto the WKUP_M3 memory space before it can
leverage any of the PM features like DeepSleep.

The IPC mechanism between MPU and WKUP_M3 uses a mailbox
sub-module and 8 IPC registers in the Control module. MPU
uses the assigned Mailbox for issuing an interrupt to
WKUP_M3 which then goes and checks the IPC registers for
the payload. WKUP_M3 has the ability to trigger on interrupt
to MPU by executing the "sev" instruction.

In the current implementation when the suspend process
is initiated MPU interrupts the WKUP_M3 to let it know about
the intent of entering DeepSleep0 and waits for an ACK. When
the ACK is received MPU continues with its suspend process
to suspend all the drivers and then jumps to assembly in
OCMC RAM. The assembly code puts the PLLs in bypass, puts the
external RAM in self-refresh mode and then finally execute the
WFI instruction. Execution of the WFI instruction triggers another
interrupt to the WKUP_M3 which then continues wiht the power down
sequence wherein the clockdomain and powerdomain transition takes
place. As part of the sleep sequence, WKUP_M3 unmasks the interrupt
lines for the wakeup sources. WFI execution on WKUP_M3 causes the
hardware to disable the main oscillator of the SoC.

When a wakeup event occurs, WKUP_M3 starts the power-up
sequence by switching on the power domains and finally
enabling the clock to MPU. Since the MPU gets powered down
as part of the sleep sequence in the resume path ROM code
starts executing. The ROM code detects a wakeup from sleep
and then jumps to the resume location in OCMC which was
populated in one of the IPC registers as part of the suspend
sequence.

The low level code in OCMC relocks the PLLs, enables access
to external RAM and then jumps to the cpu_resume code of
the kernel to finish the resume process.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Cc: Tony Lingren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
ARM: OMAP2+: AM33XX: Select Mailbox when PM is enabled

PM services on AM33XX depend on mailbox for communication
with WKUP-M3 core so ensure that the right config options
are selected. Thanks to Kevin Hilman <khilman@deeprootsystems.com>
for the suggestion on updating the Kconfig and not just
the omap2plus_defconfig which was done in the previous version
of the AM33XX suspend-resume support.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Cc: Tony Lingren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
ARM: OMAP2+: AM33XX: Hookup AM33XX PM code into OMAP builds

With all the requisite changes in place we can now
enable basic PM support on AM33XX. This patch updates
the various OMAP files to enable suspend-resume on
AM33XX.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Cc: Tony Lingren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

Conflicts:
	arch/arm/mach-omap2/Makefile