cappuccino/execute_ctrl: flush ctrl and wb stage
cappuccino/ctrl: add output port for doing_rfe
cappuccino/ctrl: avoid taking exceptions when bubble is in ctrl stage

since the bubble isn't a real instruction, the normal rules
for what has been executed isn't exactly correct when the
bubble has entered control stage, so we have to wait until
a real instruction has advanced into ctrl stage before taking
the exception.
cappuccino/fetch: use the internal immu_spr_bus_stb

this was just a missed regenerate autos when adding
immu
cappuccino/fetch: seperate exception branch indication

the exception signals should be cleared when the
exception is being indicated, this adds a bit more
fine grained control over this.
cappuccino/fetch: add doing_rfe_i input
cappuccino/cpu: connect exec_bubble, doing_rfe and branch_except_occur_i

and regenerate
cappuccino/execute_ctrl: more ctrl stage flush
cappuccino/ctrl: threat ticktimer and pic epcr as other exceptions

with the flushing of ctrl and wb stages in place,
the pc that is pushed into ctrl stage along with the pic/tt
exception is the pc that should end up in epcr (unless it's a
delay slot), since it's excecution has not been fulfilled.

The syscall exception still needs extra handling since it
should always point to the instruction after the syscall.
icache: Fix one-off in tag-valid bit calculation

The tag valid bit position was off by one bit for the
2nd way, making that way never valid.
dcache: Fix one-off in tag-valid bit calculation

The tag valid bit position was off by one bit for the
2nd way, making that way never valid.