target-s390x: Use mulu2 for mlgr insn

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-arm: Use mul[us]2 in gen_mul[us]_i64_i32

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-arm: Use mul[us]2 and add2 in umlal et al

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-arm: Use add2 in gen_add_CC

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-arm: Implement adc_cc inline

Use add2 if available, otherwise use 64-bit arithmetic.

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-arm: Implement sbc_cc inline

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-mips: Use mul[us]2 in [D]MULT[U] insns

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-cris: Use mul*2 in mul* insns

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-ppc: Use mul*2 in mulh* insns

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-ppc: Split out SO, OV, CA fields from XER

In preparation for more efficient setting of these fields.

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-ppc: Use setcond in gen_op_cmp

Which means that callers need not copy data into local tmps.

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-ppc: Compute addition overflow without branches

Signed-off-by: Richard Henderson <rth@twiddle.net>
target-ppc: Compute addition carry with setcond

Signed-off-by: Richard Henderson <rth@twiddle.net>