gpu: msm: Add new Adreno driver

* Temporary place for this.

Change-Id: I83b5d75fbd201c352d011ed43f21ebe3576e058c
kref: Implement kref_get_unless_zero v3

This function is intended to simplify locking around refcounting for
objects that can be looked up from a lookup structure, and which are
removed from that lookup structure in the object destructor.
Operations on such objects require at least a read lock around
lookup + kref_get, and a write lock around kref_put + remove from lookup
structure. Furthermore, RCU implementations become extremely tricky.
With a lookup followed by a kref_get_unless_zero *with return value check*
locking in the kref_put path can be deferred to the actual removal from
the lookup structure and RCU lookups become trivial.

v2: Formatting fixes.
v3: Invert the return value.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Git-commit: 4b20db3de8dab005b07c74161cb041db8c5ff3a7
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[shrenujb@codeaurora.org: resolve trivial merge conflicts]
Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>

Conflicts:
	include/linux/kref.h

Change-Id: Ia41a533f964804264a8e6e31ed0a25f383dd11e7
msm: kgsl: Add separate GPU shader memory mapping

Add separate kernel memory mapping for GPU shader memory.
Previously, both the register and the shader memory were mapped
as one entity, with the mapping length being equal to combined
size of register memory and shader memory. Now, we separate the
shader memory mapping to help in cases of GPU devices where the
shader and register memory may not be adjacent. This helps to
dump the shader memory in the postmortem snapshot. By having a
separate mapping for shader memory, the snapshot dump routine
simply reads in the shader memory range specified and dumps.

Signed-off-by: Harsh Vardhan Dwivedi <hdwivedi@codeaurora.org>

Conflicts:
	drivers/gpu/msm/adreno_a3xx_snapshot.c

Change-Id: Ia51cdbc6a682abe6505bcc53c997ef9c9192f9e6
msm: kgsl: Add intermediate power levels

Make use of the two independent power domains to
add intermediate levels.  Attempt to just increase
the bus frequency before also raising the GPU
frequency.

Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>

Conflicts:
	arch/arm/boot/dts/msm8974-gpu.dtsi
	arch/arm/boot/dts/msm8974-v2.dtsi
	drivers/gpu/msm/kgsl_pwrctrl.c
	drivers/gpu/msm/kgsl_pwrctrl.h

Change-Id: Ibe85d1c02941430c5da83a75a09d5bc0ec5f8ec0
iommu/core: pass a user-provided token to fault handlers

Sometimes a single IOMMU user may have to deal with several
different IOMMU devices (e.g. remoteproc).

When an IOMMU fault happens, such users have to regain their
context in order to deal with the fault.

Users can't use the private fields of neither the iommu_domain nor
the IOMMU device, because those are already used by the IOMMU core
and low level driver (respectively).

This patch just simply allows users to pass a private token (most
notably their own context pointer) to iommu_set_fault_handler(),
and then makes sure it is provided back to the users whenever
an IOMMU fault happens.

The patch also adopts remoteproc to the new fault handling
interface, but the real functionality using this (recovery of
remote processors) will only be added later in a subsequent patch
set.

Cc: Fernando Guzman Lugo <fernando.lugo@ti.com>
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
[ohaugan@codeaurora.org: Resolved compilation and merge issues]
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>

Conflicts:
	drivers/video/msm/mdss/mdss_mdp.c

Change-Id: I610966aeb936e0d026c6ef35a56453337e1b3c76
msm: Fix mem leak when using per-process pages

When GPU is using per process page tables the code creates
a new page table (domain) for every process. There is also
some associated structures allocated to keep track of each
domain. However, when cleaning up the memory used for a page
table only the domain is freed and not the associated structures.

Add a function to allow a client to properly unregister a domain
which will free all the memory associated with a domain.
Call the unregister function from kgsl driver code.

CRs-fixed: 480801
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/iommu_domains.c

Change-Id: I78365cac8afb900450b512527f0cb71da5e9ddb2
ARM: Add support for 64 bit register reads/writes

Add macros to read and write to 64 bit registers.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>

Conflicts:
	arch/arm/include/asm/io.h

Change-Id: Ied2b38e6a3803377cd271fe7b13f6cf0fc586e70
msm: scm: Add scm_call_atomic3

Some drivers need to pass three arguments atomically. Add support
for it.

Change-Id: I0077d26eeab0e6a3828f994fd4aabc4d73d48b31
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
driver core: Add iommu_group tracking to struct device

IOMMU groups allow IOMMU drivers to represent DMA visibility
and isolation of devices.  Multiple devices may be grouped
together for the purposes of DMA.  Placing a pointer on
struct device enable easy access for things like streaming
DMA programming and drivers like VFIO.

Change-Id: I0a92a94aea0ac699676914a033477243a70dd0b0
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
fix derps

Change-Id: I327cecbd3159621b7655f51033f14f87589c03ed
msm: We are using the msm2 gpu driver, not msm

Fix references that are incorrectly pointing at drivers/gpu/msm
instead of msm2.

The incorrect includes cause linaro gcc 4.8 with -O3 to produce
an unbootable kernel on the DLX.

While it doesn't seem to be affecting our normal builds, not
fixing it will likely bite us in the future in some other
mysterious way.

Change-Id: I3c51062ca6a66ddb9782365d2c51c5e485556c1b
bcmdhd: update to 1.88.51 from gpe 4.4

Change-Id: Ide40296c73e000798e174c9043a4cb8ec6a82639
msm: vidc: Use min_dpb from resource tracker in smooth streaming mode

Get min_dpb from resource tracker always if smooth streaming
mode is enabled to handle number of output buffers properly.

Change-Id: Ic46f76061f3895fda44e1d8e94198f898e5edf9b
Signed-off-by: Deepak Verma <dverma@codeaurora.org>
msm: msm_fb: Map RGB layers to the max possible size.

IOMMU Page Faults are observed on RGB layers during stability
because MDP is trying to fetch out of mapped area of the buffer.
This patch avoids the issue by overmapping the RGB layers to the
max possible RGB buffer size.

Change-Id: Idc7ac9acad70e351acac5dba2ae43b8731e84d35
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
msm: msm_fb: Do not use ION_IOMMU_UNMAP_DELAYED flag.

Since iommu buffers will be unmapped after two newer commits
had passed, there is no need to request iommu driver to further
delay unmapping an iommu buffer.

Change-Id: I44099054114403fa7ac6a5e3c71a43d6b932f4a3
Signed-off-by: raghavendra ambadas <rambad@codeaurora.org>
msm: fb: Fix security bugs in msmfb_notify_update & msm_fb_ioctl

msmfb_notify_update: Correct signature of msmfb_notify_update from
the ioctl declaration.

msm_fb_ioctl: Add appropriate null check for mfd data structure
before accessing it's members. This prevents null pointer accesses
in the driver.

CRs-Fixed: 526286
Change-Id: I731018057214fb0fa58c7617934100d2425617f8
Signed-off-by: Neti, Ravi Kumar <ravineti@codeaurora.org>
msm: mdp: Revert changes for delaying commit for tiled video

This reverts commits 3ec662e7079cad581e1b6f13a386059b40fa237a and.
bb3d5cf6e59c86dc619332fad568430c737e7a45.
These commits cause corruption with dynamic resolution changes

Bug: 10192531
Change-Id: I2dcce2fdc358bb0b87885e2ae3f853b4e728b498
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
msm: vidc: estimate min_dpb for smooth streaming mode

In case of smoothstreaming:
[1] get dpb requirement for the firmware
[2] get count in resource resource tracker
Use higher of the above

b/10192531

Signed-off-by: Deepak Verma <dverma@codeaurora.org>
Signed-off-by: Praveen Chavan <pchavan@codeaurora.org>
msm: vidc: Set input buffer size dynamically

This change supports overriding of default input
buffer size using a set parameter call from the
client.

Change-Id: I5225ec53ba16b68aeedd4c30897bd291e81b4b09
Signed-off-by: Deepak Verma <dverma@codeaurora.org>
msm_fb: display: Program TILE video frame size in dma ISR

Since, video tile frame size register is single buffered, its
value takes effect as soon as it is programmed. Single buffered
registers like this should be configured very close to the vsync
to prevent issues like flicker or artifacts.
Program this register in dma ISR to prevent flickers and IOMMU
page faults.

Change-Id: Ifa770e4b4f29d6e4070e51388043422cc60e5872
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>