options can now parse expressions
dc and tran accept expression parameters
.verify statements now work again after function change
resistors, capacitors, inductors accept expression values
mosfets hopefully accept expression values; untested
Merge branch 'master' of https://github.com/6004x/6.004x into jsim
sources and source functions take expression values
making things more modular; working on only having parser use one call to parse_number
still working on sequential reading of lines and fixing the stuff that parentheses as tokens broke
Merge branch 'master' of https://github.com/6004x/6.004x into jsim
lab 1 works again
pulled from master, kept origin's changes to jsim.html
fixing bugs with plot functions and lab 2
Merge branch 'master' of https://github.com/6004x/6.004x into jsim
Merge branch 'master' of https://github.com/6004x/6.004x into jsim
added lab2checkoff to the bank of files
transistor level standard cell
fixed stdcell_t errors, added comments in parser and simulator
Merge branch 'master' of https://github.com/6004x/6.004x into jsim