- remade a partitioned altera project
  - Add DE1 pin assignments and constraints
  - Add initial git ignore for synthesis temp files
 - add more temp to .gitignore
 - add empty top level module
 - start making simulation and synthesis Makefile
 - start adding read.me files
 - get makefile to build source
 - add more temps to git ignore
 - added directories for project layout
 - Makefile changes, probably about to change massively in the future
Merge branch 'cpu'