msm: 8974: Add function to reserve memory from device tree

Memory reservations for memory pools or using memblock remove
must happen early at bootup. Add a function at early boot to
walk the flattened device tree and extract memory reservation
information from appropriate bindings in device tree. To ensure
that the memory is only reserved when a driver is enabled,
drivers must put EXPORT_COMPAT(<compat string>) in the driver
as well as adding the binding to the device tree. More
documentation is available in
Documentation/devicetree/bindings/arm/msm/memory-reserve.txt

Change-Id: I28fa71d7a30cea9af5447acb5d2dde562fa0f6de
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/memory.c
gpu: ion: Add support for device tree.

Add device tree parsing to common msm ion code
to allow new targets to specify ION heap configuration
in device tree.

Document the device tree bindings for ION.

Change-Id: I40b7f4b1fbb3ca4ad1d6dc06a33b647f6af1d669
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
msm: iommu: Specify SMT sizes in device tree

Since the IOMMU ID registers are only accessible by the
secure environment, specify the SMT sizes in device tree
so that the IOMMU driver knows how many SMRs to initialize.

Change-Id: I614a51069c0304f71b0c7d061d97aca0289c17ea
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
iommu/msm: Refactor device tree parsing

Query SMT and SID mapping information at probe-time instead
of attach-time to allow this information to be
error-checked at an earlier time.

Change-Id: Ib2bbdc8374f9c86c3e6013d298fe8b279b53d83b
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
iommu/msm: Add TLB sync operations

The hardware requires a TLB sync operation at the end of
each TLB maintenance operation.

Change-Id: I8102253cfc12af530216346efa5bb9760db25352
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
msm: iommu: Support alternate core clocks

Refactor the IOMMU clock control code to always require a
core clock as well as an interface clock. Add support for
an optional alternate core clock and update device tree
bindings accordingly. Clean up the probe function to remove
needless enabling / disabling of clocks.

Change-Id: I4d744ffabc1e6fb123bacfda324f64408257cb25
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
iommu/msm: fix the include guard in iommu.h

msm_soc_version_supports_iommu_v1() was defined outside the guard.

Change-Id: I47a579cf14c159c4cbe44b855067c0b82da7b552
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Alex Wong <waiw@codeaurora.org>
msm: iommu: Synchronize access to IOMMU cfg port

Add remote spinlock that allows CPU and GPU to
synchronize access to IOMMU hardware.

Add usage of remote spinlock to iommu driver and
add depenency on SFPB hardware mutex being enabled.`

This feature is not using SFPB hardware mutex. However,
SFPB hardware mutex must be enabled since the remote
spinlock implementation is making use of shared memory
that is normally used when SFPB hardware mutex is not enabled.

Change-Id: I42e11d742e295110843c4b45d6d27cc665d42b7b
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Alex Wong <waiw@codeaurora.org>
msm: Kconfig: Enable IOMMU CPU-GPU synchronization

Enable synchronization between CPU and GPU for
IOMMU configuration register accesses.

Change-Id: I7409090c0fc811fa28562644bcbfd4f91a8a7425
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/Kconfig
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Alex Wong <waiw@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/Kconfig
dt/flattree: Add stub defintions for flat device tree function

Several flattened device tree functions are currently accessed in a
file that is compiled regardless of whether device tree is enabled
or not. Add stubs for these functions if device tree is not selected.

Change-Id: I0bea3325692fac46d3e5ef457aa30e083f71cd6d
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
gpu/msm: bulk update kgsl from mako

Change-Id: Ic81558ae82ae50506ac35fdc51290259dfedf4ef

Conflicts:

	drivers/gpu/msm/adreno_drawctxt.c
	drivers/gpu/msm/kgsl.c
	drivers/gpu/msm/kgsl_mmu.h
msm: kgsl: Move the pdata structure from the public API header

The pdata structure and associated structs have no business being
in msm_kgsl.h.  Move them to include/mach/kgsl.h where they can
thrive in a non-userspace facing environment.

Change-Id: Ic0dedbadfe0d3d7d44f50c8a9a7f4cc59057d44b
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Move SOC based chip ID to the board files

Move almost all of the SOC based GPU identification code out
of the KGSL driver and into the board files.  This cleans up
the GPU side and reduces our usage of the cpu_is and machine_is
macros.

Change-Id: Ic0dedbad34eb034316b7baabf05aa7f8e8aa9ced
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/board-8930-gpu.c
msm: board-8930: Configure GPU turbo clock for msm8930 HW varients.

As per msm8930 HW varients, default GPU turbo clock is 400MHz used for
msm8930,msm8627 and 450MHz for msm8930aa.

CRs-Fixed: 375984
Change-Id: I0e971079ce4d2f2a9c65d6b8449ef201124536af
Signed-off-by: Sudhakara Rao Tentu <srtentu@codeaurora.org>
msm: kgsl: Enable GDHS of GPU power rail while the screen is on

Turn on the feature which allows SLUMBER in place of SLEEP for targets
with low latency GPU power rail bring-up.

CRs-Fixed: 369927
Change-Id: I3c2bf2049a6b7670da7c2e5ec4cde3cf66642c9b
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
ion: bulk update from mako

Change-Id: I57035a880c7209387bcf2fe270545bfbc6f4abf2
ion: ioctl compat with old api

Change-Id: Iea40fac9caa783ede26281e090ec6cb82353d5bd
msm: Export some iommu domain management functions

Several of the iommu virtual address space functions may
need to be accessed by modules. Export the symbol.

Change-Id: Ief99cbb63f729943b6d8b45ce9aed071d84decd1
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
msm: iommu: Fix SMR NSCFG configuration

When setting the NSCFG field, the S2CR register being
written needs to be indexed by the stream matching group,
not by the value of the SID being configured. Additionally,
there is no need to set CBACR for every SMR that is
programmed.

Change-Id: Ib79771a3bd87e4bd3b353bd5c6de9247138ca43e
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
iommu: msm: Configure memory attribute overrides

The default IOMMU memory attribute setting results in
reduced performance as a result of downgrading memory
attributes. Fix that.

Change-Id: Ie04175b8037855e4c962eac281f7f88901ae2034
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>