Merge branch 'develop'

Major hardware updates
Pull up a define for noops
Adding strobes

Strobe signal in Core is way too wide, but cyc[2] doesn't work for an
unknown reason.
Cosmetic rearrangement of Reg instance ports
More cosmetics
Unify xilinx and icarus top-files

Now there is only one top.v.
Push down posedge into RTL
Add $readmemh()-compatible output format
Infer main RAM instead of using coregen

Under advice from MatthiasM@freenode, have XST infer the main memory
instead of using a coregen. This means our simmem becomes a real
BlockRAM module. Seems to work well in simulation, but not yet on
hardware. Other changes with timing are going on at the same time,
however, so it remains to be seen what is the root cause of the
hardware failure.
Cosmetics
Mend a bug with +LOGFILE ; comment
Move baremetal fib to ex/
Cosmetics, generalisation, fixed BlockRAM
Compilation mended for Quartus

Artificial __QUARTUS__ symbol introduced ; replace with a standard one
when one is known.
New memory strobe behaviour and rhs state

Separate timing for read strobe and write strobe
CPI not IPC
Register read data
CPI to 8 while multiplier issues persist
No more blocking assignments in Core
No more blocking assignments in Exec