main: Fix MaxUniformComponents for geometry shaders.

For both vertex and fragment shaders we default MaxUniformComponents
to 4 * MAX_UNIFORMS.  It makes sense to do this for geometry shaders
too; if back-ends have different limits they can override them as
necessary.

Fixes piglit test:
spec/glsl-1.50/built-in constants/gl_MaxGeometryUniformComponents

Cc: "10.0" <mesa-stable@lists.freedesktop.org>
i965: Fix vertical alignment for multisampled buffers.

From the Sandy Bridge PRM, Vol 1 Part 1 7.18.3.4 (Alignment Unit
Size):

    j [vertical alignment] = 4 for any render target surface is
    multisampled (4x)

From the Ivy Bridge PRM, Vol 4 Part 1 2.12.2.1 (SURFACE_STATE for most
messages), under the "Surface Vertical Alignment" heading:

    This field is intended to be set to VALIGN_4 if the surface was
    rendered as a depth buffer, for a multisampled (4x) render target,
    or for a multisampled (8x) render target, since these surfaces
    support only alignment of 4.

Back in 2012 when we added multisampling support to the i965 driver,
we forgot to update the logic for computing the vertical alignment, so
we were often using a vertical alignment of 2 for multisampled
buffers, leading to subtle rendering errors.

Note that the specs also require a vertical alignment of 4 for all
Y-tiled render target surfaces; I plan to address that in a separate
patch.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53077
i965/gen7: Prefer vertical alignment of 4 when possible.

Gen6+ allows for color buffers to use a vertical alignment of either 4
or 2.  Previously we defaulted to 2.  This may have caused problems on
Gen7 because Y-tiled render targets are not allowed to use a vertical
alignment of 2.

This patch changes the vertical alignment to 4 on Gen7, except for the
few formats where a vertical alignment of 2 is required.
i965/gen7: Disallow Y tiling of renderable surfaces with valign of 2.

Gen7 does not allow render targets to have a vertical alignment of 2.
So, when creating a surface, if its format is renderable, and its
vertical alignment is 2, force it to use X tiling.
i965/gen7: Emit workaround flush when changing GS enable state.
glsl: Rework interface block linking.

Previously, when doing intrastage and interstage interface block
linking, we only checked the interface type; this prevented us from
catching some link errors.

We now check the following additional constraints:

- For intrastage linking, the presence/absence of interface names must
  match.

- For shader ins/outs, the interface names themselves must match when
  doing intrastage linking (note: it's not clear from the spec whether
  this is necessary, but Mesa's implementation currently relies on
  it).

- Array vs. nonarray must be consistent, taking into account the
  special rules for vertex-geometry linkage.

- Array sizes must be consistent (exception: during intrastage
  linking, an unsized array matches a sized array).

Note: validate_interstage_interface_blocks currently handles both
uniforms and in/out variables.  As a result, if all three shader types
are present (VS, GS, and FS), and a uniform interface block is
mentioned in the VS and FS but not the GS, it won't be validated.  I
plan to address this in later patches.

Fixes the following piglit tests in spec/glsl-1.50/linker:
- interface-blocks-vs-fs-array-size-mismatch
- interface-vs-array-to-fs-unnamed
- interface-vs-unnamed-to-fs-array
- intrastage-interface-unnamed-array
!UPSTREAM: i965/gs: Generalize some error messages for GS.

TODO: find more places to generalize.
TODO: Don't use "VS/GS" terminology.  Use "vec4" terminology, since that will endure longer.
!UPSTREAM: glsl/linker: Fail if linking geometry shader with 0 GEOMETRY_VERTICES_OUT.

ARB_geometry_shader4 spec 2.15.2:
"Linking will also fail [...] if the program object contains objects to form a
geometry shader, and the value of GEOMETRY_VERTICES_OUT_ARB is zero."

Reviewed-by: Paul Berry <stereotype441@gmail.com>

TODO: May not be necessary for GLSL 1.50 style geometry shaders.  Make a test to validate.
!UPSTREAM: Debug optimization passes.
!UPSTREAM: Work around bug in AntTweakBar

AntTweakBar tries to use glGetString(GL_EXTENSIONS) when connected to
a core context (it should use glGetStringi()).  Go ahead and allow
this for the time being.
i965/vec4: Fix broken IR annotation in debug output.

Commit 70953b5 (i965: Initialize all member variables of
vec4_instruction on construction) inadvertently added a line to the
vec4_instruction constructor setting this->ir to NULL, wiping out the
previously set value.  As a result, ever since then, the output of
INTEL_DEBUG=vs and INTEL_DEBUG=gs has been missing IR annotations.