[mips] Mark instructions defined in Mips64InstrInfo.td that are duplicates of
instructions defined in MipsInstrInfo.td as codegen-only instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187828 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] We dont have any target specific flags yet for generating symbol references, so get rid of the default-only switch statement.  Fixes an MSVC warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187829 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add more special cases for opcodes to ensureSRegLimit()

Also factor out the register class lookup to its own function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187830 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Use VSrc_* register classes as the default classes for types

Since the VSrc_* register classes contain both VGPRs and SGPRs, copies
that used be emitted by isel like this:

SGPR = COPY VGPR

Will now be emitted like this:

VSrC = COPY VGPR

This patch also adds a pass that tries to identify and fix situations where
a VGPR to SGPR copy may occur.  Hopefully, these changes will make it
impossible for the compiler to generate illegal VGPR to SGPR copies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187831 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Rename register classes CPURegs and CPU64Regs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187832 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Add new file from r187831 to CMakeLists.txt

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187834 91177308-0d34-0410-b5e6-96231b3b80d8
Replacing /GR with /GR- instead of applying both options to the project.  This should reduce some build bot warnings (D9025: "overriding '/GR' with '/GR-'").

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187836 91177308-0d34-0410-b5e6-96231b3b80d8