BACKPORT: i2c-designware: enable/disable the controller properly

The correct way to disable or enable the controller is to wait until the
DW_IC_ENABLE_STATUS register bit matches the bit we program into DW_IC_ENABLE
register. This procedure is described in the DesignWare I2C databook.

By doing this we can be sure that the controller is in correct state once
the function returns.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
(cherry picked from commit 3ca4ed8715a6677ce2cdd7aa471685e653b5114d)

BUG=chrome-os-partner:19495
TEST=none: still not able to detect device

Change-Id: If95284915280f35b0e3fe97e0ffa6808234bf9da
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56072
Reviewed-by: Benson Leung <bleung@chromium.org>
BACKPORT: i2c-designware: use usleep_range() in the busy-loop

This is not an atomic context so there is no need to use mdelay() but
instead use usleep_range().

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
(cherry picked from commit 1451b91ffef5a2ac7df28a6d8fc270ccbee5d8ac)

BUG=chrome-os-partner:19495
TEST=none: still not able to detect device

Change-Id: If13cdb734c1827e2525f4f0e58c5e630daf7dcb2
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56073
Reviewed-by: Benson Leung <bleung@chromium.org>
TEMP: pinctrl: samsung: add ability to set powerdown configs

On suspend, gpio lines are driven active low by default.  This adds an
optional powerdown-settings entry to the pinctrl nodes to allow board
device trees to specify powerdown config for pins.  It specifies the
state during powerdown of each individual gpio as:
0 - Use existing
1 - Float (input, no PU/PD)
2 - Pull up (input)
3 - Pull down (input)
4 - Output high
5 - Output low

This is based on the similar patch in gpiolib driver by Jonathan
Kliegman. https://gerrit.chromium.org/gerrit/#/c/28639/

Modified to support the upstream pinmux and move board config out of
common file by Doug Anderson.

This patch should not be necessary once the Snow device-tree is reworked
to use the "samsung,pin-{pud,con}-pdn" properites instead.

BUG=chrome-os-partner:19317
BUG=chrome-os-partner:19234
TEST=See https://gerrit.chromium.org/gerrit/#/c/51372/

Change-Id: Ida114af23cfc7b95b15a011a4e1624510de57452
Signed-off-by: Prathyush K <prathyush.k@samsung.com>
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51292
TEMP: ARM: dts: Add powerdown config to exynos5250-snow dts file

We take advantage of the new ability added in '71ea086 pinctrl:
samsung: add ability to set powerdown configs' to specify the
powerdown config for snow.  This is important for proper functioning
of suspend/resume.

This change is only temporary, as we should really be using the bindings
already present upstream ("samsung,pin-{pud,con}-pdn") to specify the
powerdown settings.

BUG=chrome-os-partner:19317
BUG=chrome-os-partner:19234
TEST=Suspend system using powerd_suspend and wake up system using key
press and display comes back normally.
TEST=Dump all powerdown settings and spot check; double check that
values in device tree match what we had for 3.4.

Change-Id: I71895ac359e9601ebe13b19c47dfa20041e108a9
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Prathyush K <prathyush.k@samsung.com>
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51372
CHROMEOS: HACK: Work around bluetooth kernel panic.

This patch is originally from Doron Keren <doronkeren@ti.com>
http://www.spinics.net/lists/linux-bluetooth/msg15564.html . Original
description:

The patch fixes kernel panic which is due to race condition
between the setup of incomming connection and clean-up of the
dead one. Observed in the following case: attached HID device
disconnects unexpectedly (without performing ACL disconnect ),
the device tries to connect again before the ACL link time-out
fires, this translates to the HCI_DISCONNECT, HCI_CONNECT_REQ
events on the same handle, since HCI_DISCONNECT trigers the clean
up of the HID device and handled in different context, the
linking/unlinking connection object to sysfs, may mess up.

BUG=chromium:228937,chromium:242344

TEST=The following used to cause a panic reliably, but now doesn't:
- have Apple Magic Trackpad connected and working.
- long-press power button on trackpad to power off it.
- release and long-press again to power it on again.
- immediately click/rub fingers on trackpad.

Change-Id: I14c554eed22769d677514033b77ef58887c9c6a0
Signed-off-by: Ilia Kolominsky <iliak@ti.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/56070
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Commit-Queue: Alex Deymo <deymo@chromium.org>
Tested-by: Alex Deymo <deymo@chromium.org>
CHROMIUM: ARM: Exynos5250: Revert commits for migration to CCF

This patch is a squash of the following reverts:

  fca443b CHROMIUM: ARM: Exynos5250: Add clock information for dwc3
  584b951 CHROMIUM: arm: exynos: Enable CHIP ID clock
  2db9492 CHROMIUM: ARM: EXYNOS5: Add clocks for EXYNOS5 Audio Subsystem.
  979ba1f CHROMIUM: Arm: Exynos5: Save the audio subsystem clocks
  656ef9c CHROMIUM: ARM: EXYNOS5: Support Exynos5-bus devfreq driver
  ab12dd6 CHROMIUM: ARM: Exynos: Add clock_ops callbacks for clk_fout_vpll and set VPLL to 70.5MHZ
  7ee7bc4 CHROMIUM: arm: exynos5: add ADC clock support
  c731dfa CHROMIUM: Arm: Exynos5: Add 32MHz EPLL out clk frequency
  c74ed2b CHROMIUM: ARM: EXYNOS: Add GPU registers and irqs
  5db6eb8 CHROMIUM: arm: exynos5: Fix the g3d clock hierarchy
  c167f78 CHROMIUM: arm: exynos5: Add missing G3D clock support
  93c8402 CHROMIUM: ARM: EXYNOS5: Interchange control bits of sysmmu mfc_l and mfc_r
  02005fc ARM: EXYNOS: remove system mmu initialization from arch/arm/ tree
  b4125e2 ARM: EXYNOS: Add clk_ops for gating clocks of System MMU
  33bc1f2 CHROMIUM: drm: exynos: Receive FIMD pixel clock source and source clock rate from FIMD DT node

Reverts are done to ensure a smooth merging of common clock framework
patches.  All these changes need to be added back with the CCF.  This
revert will give compilation error which is fixed by next patch, but
mali will be broken and login screen will not come.

The CQ-DEPEND is done till the last patch after CCF which can bring
back the login screen.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen
CQ-DEPEND=I0a14ea31d0b0701e428f2ac855ea0aac364865bb

[dianders: Cleaned up one squash; moved USB_ARCH_HAS_XHCI to another
patch]

Change-Id: I0527f682d3360f8c74134d8226dcf08f48fbdd08
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56039
CHROMIUM: ARM: EXYNOS: Add reverted GPU registers and irqs

The original patch c74ed2b CHROMIUM: ARM: EXYNOS: Add GPU registers and irqs
is reverted for smooth migration to common clock framework.
This patch adds back the non-clock bits from the reverted patch.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen

Change-Id: Id1ce1ae87659e5e1072ddc1438e4a9f2c7940476
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Prathyush K <prathyush.k@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/56040
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
ARM: exynos5: Enable XHCI support on exynos5

This patch enables support for XHCI on exynos5 series of SOCs,
to support host side USB 3.0 support.

This is a pick from what's been posted for upstream:
  https://patchwork.kernel.org/patch/2275221/

BUG=chrome-os-partner:19183
TEST=With all patches can boot snow to login screen

Change-Id: Ibd369f3ab5426cf38470767a542d3edda04b498f
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56062
UPSTREAM: ARM: EXYNOS: remove system mmu initialization from exynos tree

This removes System MMU initialization from arch/arm/mach-exynos/
to move them to DT and the exynos-iommu driver except gating clock
definitions.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen (with all
patches)

Conflicts:
	arch/arm/mach-exynos/Kconfig
	arch/arm/mach-exynos/mach-exynos5-dt.c

Change-Id: I72847434f14967902f41730dbe98446f95072c92
Signed-off-by: KyongHo Cho <pullip.cho@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Joerg Roedel <joro@8bytes.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
(cherry picked from commit 25e9d28d927d2e1731df53f60cde53d75bcb7c36)
Reviewed-on: https://gerrit.chromium.org/gerrit/56041
BACKPORT: ARM: EXYNOS: Migrate clock support to common clock framework

Remove Samsung specific clock support in Exynos4/5 and migrate to
use common clock framework.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen

CQ-DEPEND=I001ecef6e9f0735bc7eadacc1b7070bfdcd548d3

=============================================================
WARNING:
This is the major backport for common clock framework.
All IPs will stop working after this patch unless the remaining
CCF patches are merged and IP clocks added to DT.
=============================================================
Also this patch removes some clocks used by the cpufreq and
cpuidle drivers causing compilation error after applying this
patch. This is fixed in the next patch.

Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
(cherry picked from commit 6e6aac7590f902d14d90bace3fd4990d57b4979d)

Conflicts:
	arch/arm/mach-exynos/common.c

Change-Id: I7c88aad9cfdf40b7560c8fa2baafe658fd89bfb0
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/50816
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
CHROMIUM: ARM: Exynos: Adding clocks used by cpufreq and cpuidle

Some of the clock defines removed by the common
clock framework patch is used by the cpufreq driver for
5250. Adding them back for compilation till a
proper solution is found for this.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen

Change-Id: I001ecef6e9f0735bc7eadacc1b7070bfdcd548d3
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/50644
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
UPSTREAM: clk: exynos4: register clocks using common clock framework

The Exynos4 clocks are statically listed and registered using the
Samsung specific common clock helper functions. Both device tree
based clock lookup and clkdev based clock lookups are supported.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen

Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
(cherry picked from commit e062b571777f52dfbfc15f9edc2d36a45664bb3a)
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>

Change-Id: I04ba0f9b88bfac2597944a362e12907674cfb49d
Reviewed-on: https://gerrit.chromium.org/gerrit/50813
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
UPSTREAM: ARM: EXYNOS: remove auxdata table from exynos4/5 dt machine file

With support for device tree based clock lookup now available, remove
the auxdata table from exynos4/5 dt-enabled machine file.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
(cherry picked from commit ee6c7137d74f29de2c9b81f759ed1fbbd6c4a3d1)

Conflicts:
	arch/arm/mach-exynos/mach-exynos4-dt.c
	arch/arm/mach-exynos/mach-exynos5-dt.c

exynos5-dt conflicts are due to chromium related patches (backlight, fimd etc)
exynos4-dt conflicts are due to some extra includes which is irrelevant.

Change-Id: I5aa7ff84d7a175ceafe7530ae3e815eace4d829c
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/50819
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
UPSTREAM: clocksource: mct: use fin_pll clock as the tick clock source for mct

With the migration of Exynos4 clocks to use common clock framework, the
old styled 'xtal' clock is not used anymore. Instead, the clock 'fin_pll'
is used as the tick clock for mct controller.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
(cherry picked from commit 415ac2e240f7f3e1b609f34ba7aa1c340589fdb1)
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>

Change-Id: Ia2ee09c66f64a9c7af2a4e4992f0e7274fdf9348
Reviewed-on: https://gerrit.chromium.org/gerrit/50820
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
UPSTREAM: clocksource: mct: add support for mct clock setup

Add support for mct clock lookup and setup to ensure that the mct
clock is has been turned on.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
(cherry picked from commit ca9048ec31ab5e50c79bf18eccb79396c1f24b22)
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>

Change-Id: I97a8a129dea844f4362a015363c489518ec20ce0
Reviewed-on: https://gerrit.chromium.org/gerrit/50821
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
ARM: dts: Adding mali node to Exynos5250

Mali driver is converted to a DT based driver for
supporting common clock framework. This patch adds the
DT node for Mali.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen

Change-Id: Ie08944f85f8962a5e5181961abd3afe91696e107
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/55772
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
ARM: Mali: Add device tree support

The Mali driver is converted to a DT based driver for
supporting common clock framework.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen

Change-Id: I0a14ea31d0b0701e428f2ac855ea0aac364865bb
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/55773
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
CHROMIUM: arm: exynos: Enable CHIP ID clock

The commit 584b951 : "CHROMIUM: arm: exynos: Enable CHIP ID clock"
was reverted for merging with CCF. The changes done in the
asv-5250.c file as part of that commit is added back in this patch.

BUG=chrome-os-partner:19183
TEST=Boot and see proper chip ID / lot ID in dmesg (compare to 3.4).
On my machine:
  [    1.100000] EXYNOS5250: Adaptive Support Voltage init
  [    1.170000] Exynos5250: Lot ID is NZW25 and wafer number is 2
  [    1.175000] EXYNOS5250: IDS:21 HPM:15 RESULT:7 MIF:2

[dianders: added "prepare" / "unprepare"; updated TEST]

Change-Id: I48a97e4e9b9cd6370f08ad267ecb52e2367e650b
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56042
UPSTREAM: clk: exynos5250: register clocks using common clock framework

The Exynos5250 clocks are statically listed and registered using the
Samsung specific common clock helper functions. Both device tree based
clock lookup and clkdev based clock lookups are supported.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
(cherry picked from commit 6e3ad26816b7281ce3b51296180aeba5d1528d1c)
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>

Change-Id: Ic15d39ab3dfb57d2b9a74a6e7314256ca97af999
Reviewed-on: https://gerrit.chromium.org/gerrit/50814
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
UPSTREAM: clk: exynos5440: register clocks using common clock framework

The Exynos5440 clocks are statically listed and registered using the
Samsung specific common clock helper functions.

BUG=chrome-os-partner:19183
TEST=Built and booted snow board and saw login screen

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
(cherry picked from commit f2585b1cce24d7bc5b4a1de582bf81e43813f840)
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>

Change-Id: If8bb3e5653db9637f289944bba6b6ababad950e2
Reviewed-on: https://gerrit.chromium.org/gerrit/50815
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>