pic: ack all spr accesses, not only writes
ticktimer: ack all spr accesses, not only writes
execute_alu: add support for overflow, carry and divide by zero

Add support for the add-with-carry-in instruction.

Generate carry (unsigned overflow) for add, addc, sub, mulu and divide by zero for divu.

Generate overflow (signed overflow) for add, addc, sub, mul and divide by zero for div.
espresso: add carry and overflow support
pronto espresso: add carry and overflow support
cappuccino: add carry, overflow and range exception support
espresso: update get_gpr
cappuccino: remove signals not needed by monitor in pipeline wrapper
Merge branch 'master' of https://github.com/openrisc/mor1kx into carry-overflow-support
icache: Fix one-off in tag-valid bit calculation

The tag valid bit position was off by one bit for the
2nd way, making that way never valid.
dcache: Fix one-off in tag-valid bit calculation

The tag valid bit position was off by one bit for the
2nd way, making that way never valid.
mor1kx-sprs: add DRR definitions
ctrl prontoespresso: add DRR functionality, fix NPC writing logic

DRR[TE] is now set on software breakpoint.

A register which held the written NPC was redundant and has been removed
ctrl espresso: add software breakpoint functionality

Cause l.trap with DSR[TE] set to stall the processor
mor1kx top-level: enable add-with-carry support and overflow detection by default
cfgrs: set VR VER to 0x10

Even though the VR register is considered to be deprecated,
values outside of the range 0x10 and 0x19 has been stated
as illegal for OpenRISC 1000 implemantations in the
arch spec.
 cappuccino/lsu: fix typo in dbus_sel_o dcache bypass
cappuccino: move icache into fetch
cappuccino: remove unused op_mfspr wire
cappuccino/ctrl: default spr acks to 1 instead of 0

If the ack is to be used for mfspr this is necessary
for reading out 0 as default, otherwise the cpu will lock-up
while waiting for the ack.