* config/avr/avr.c (avr_out_xload): No SBIS around LPM so that
	instruction sequence is 1 byte shorter.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201121 138bc75d-0d04-0410-961f-82ee72b054a4
2013-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/predicates.md (shiftable_operator_strict_it):
	New predicate.
	* config/arm/thumb2.md (thumb_andsi_not_shiftsi_si):
	Disable cond_exec version for arm_restrict_it.
	(thumb2_smaxsi3): Convert to generate cond_exec.
	(thumb2_sminsi3): Likewise.
	(thumb32_umaxsi3): Likewise.
	(thumb2_uminsi3): Likewise.
	(thumb2_abssi2): Adjust constraints for arm_restrict_it.
	(thumb2_neg_abssi2): Likewise.
	(thumb2_mov_scc): Add alternative for 16-bit encoding.
	(thumb2_movsicc_insn): Adjust alternatives.
	(thumb2_mov_negscc): Disable for arm_restrict_it.
	(thumb2_mov_negscc_strict_it): New pattern.
	(thumb2_mov_notscc_strict_it): New pattern.
	(thumb2_mov_notscc): Disable for arm_restrict_it.
	(thumb2_ior_scc): Likewise.
	(thumb2_ior_scc_strict_it): New pattern.
	(thumb2_cond_move): Adjust for arm_restrict_it.
	(thumb2_cond_arith): Disable for arm_restrict_it.
	(thumb2_cond_arith_strict_it): New pattern.
	(thumb2_cond_sub): Adjust for arm_restrict_it.
	(thumb2_movcond): Likewise.
	(thumb2_extendqisi_v6): Disable cond_exec variant for arm_restrict_it.
	(thumb2_zero_extendhisi2_v6): Likewise.
	(thumb2_zero_extendqisi2_v6): Likewise.
	(orsi_notsi_si): Likewise.
	(orsi_not_shiftsi_si): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201122 138bc75d-0d04-0410-961f-82ee72b054a4
	PR testsuite/52641
	* gcc.c-torture/execute/pr57124.x: Skip int16 platforms.
	* gcc.c-torture/execute/pr53366-1.x: New: Skip int16 platforms.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201123 138bc75d-0d04-0410-961f-82ee72b054a4
	* config/arm/arm.md (attribute "insn"): Delete.
	(attribute "type"): Add "mov_imm", "mov_reg", "mov_shift",
	"mov_shift_reg", "mvn_imm", "mvn_reg", "mvn_shift" and "mvn_shift_reg".
	(not_shiftsi): Update for attribute change.
	(not_shiftsi_compare0): Likewise.
	(not_shiftsi_compare0_scratch): Likewise.
	(arm_one_cmplsi2): Likewise.
	(thumb1_one_cmplsi2): Likewise.
	(notsi_compare0): Likewise.
	(notsi_compare0_scratch): Likewise.
	(thumb1_movdi_insn): Likewise.
	(arm_movsi_insn): Likewise.
	(movhi_insn_arch4): Likewise.
	(movhi_bytes): Likewise.
	(arm_movqi_insn): Likewise.
	(thumb1_movqi_insn): Likewise.
	(arm32_movhf): Likewise.
	(thumb1_movhf): Likewise.
	(arm_movsf_soft_insn): Likewise.
	(thumb1_movsf_insn): Likewise.
	(thumb_movdf_insn): Likewise.
	(movsicc_insn): Likewise.
	(movsfcc_soft_insn): Likewise.
	(and_scc): Likewise.
	(cond_move): Likewise.
	(if_move_not): Likewise.
	(if_not_move): Likewise.
	(if_shift_move): Likewise.
	(if_move_shift): Likewise.
	(if_shift_shift): Likewise.
	(if_not_arith): Likewise.
	(if_arith_not): Likewise.
	(cond_move_not): Likewise.
	* config/arm/neon.md (neon_mov<mode>): Update for attribute change.
	(neon_mov<mode>): Likewise.
	* config/arm/vfp.md (arm_movsi_vfp): Update for attribute change.
	(thumb2_movsi_vfp): Likewise.
	(movsf_vfp): Likewise.
	(thumb2_movsf_vfp): Likewise.
	* config/arm/arm.c (xscale_sched_adjust_cost): Update for attribute change.
	(cortexa7_older_only): Likewise.
	(cortexa7_younger): Likewise.
	* config/arm/arm1020e.md (1020alu_op): Update for attribute change.
	(1020alu_shift_op): Likewise.
	(1020alu_shift_reg_op): Likewise.
	* config/arm/arm1026ejs.md (alu_op): Update for attribute change.
	(alu_shift_op): Likewise.
	(alu_shift_reg_op): Likewise.
	* config/arm/arm1136jfs.md (11_alu_op): Update for attribute change.
	(11_alu_shift_op): Likewise.
	(11_alu_shift_reg_op): Likewise.
	* config/arm/arm926ejs.md (9_alu_op): Update for attribute change.
	(9_alu_shift_reg_op): Likewise.
	* config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute change.
	(cortex_a15_alu_shift): Likewise.
	(cortex_a15_alu_shift_reg): Likewise.
	* config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute change.
	(cortex_a5_alu_shift): Likewise.
	* config/arm/cortex-a53.md (cortex_a53_alu): Update for attribute change.
	(cortex_a53_alu_shift): Likewise.
	* config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute change.
	(cortex_a7_alu_reg): Likewise.
	(cortex_a7_alu_shift): Likewise.
	* config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change.
	(cortex_a8_alu_shift): Likewise.
	(cortex_a8_alu_shift_reg): Likewise.
	(cortex_a8_mov): Likewise.
	* config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute change.
	(cortex_a9_dp_shift): Likewise.
	* config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute change.
	* config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute change.
	(cortex_r4_mov): Likewise.
	(cortex_r4_alu_shift): Likewise.
	(cortex_r4_alu_shift_reg): Likewise.
	* config/arm/fa526.md (526_alu_op): Update for attribute change.
	(526_alu_shift_op): Likewise.
	* config/arm/fa606te.md (606te_alu_op): Update for attribute change.
	* config/arm/fa626te.md (626te_alu_op): Update for attribute change.
	(626te_alu_shift_op): Likewise.
	* config/arm/fa726te.md (726te_shift_op): Update for attribute change.
	(726te_alu_op): Likewise.
	(726te_alu_shift_op): Likewise.
	(726te_alu_shift_reg_op): Likewise.
	* config/arm/fmp626.md (mp626_alu_op): Update for attribute change.
	(mp626_alu_shift_op): Likewise.
	* config/arm/marvell-pj4.md (pj4_alu_e1): Update for attribute change.
	(pj4_alu_e1_conds): Likewise.
	(pj4_alu): Likewise.
	(pj4_alu_conds): Likewise.
	(pj4_shift): Likewise.
	(pj4_shift_conds): Likewise.
	(pj4_alu_shift): Likewise.
	(pj4_alu_shift_conds): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201124 138bc75d-0d04-0410-961f-82ee72b054a4
2013-07-22  Tobias Burnus  <burnus@net-b.de>

        * trans-array.c (gfc_array_allocate,
        gfc_trans_deferred_array): Plug memory leak.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201125 138bc75d-0d04-0410-961f-82ee72b054a4
2013-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/constraints.md (Pd): Allow TARGET_THUMB
	instead of TARGET_THUMB1.
	(Pz): New constraint.
	* config/arm/arm.md (arm_addsi3): Add alternatives for 16-bit
	encodings.
	(compare_negsi_si): Likewise.
	(compare_addsi2_op0): Likewise.
	(compare_addsi2_op1): Likewise.
	(addsi3_carryin_<optab>): Likewise.
	(addsi3_carryin_alt2_<optab>): Likewise.
	(addsi3_carryin_shift_<optab>): Disable cond_exec variant
	for arm_restrict_it.
	(subsi3_carryin): Likewise.
	(arm_subsi3_insn): Add alternatives for 16-bit encoding.
	(minmax_arithsi): Disable for arm_restrict_it.
	(minmax_arithsi_non_canon): Adjust for arm_restrict_it.
	(satsi_<SAT:code>): Disable cond_exec variant for arm_restrict_it.
	(satsi_<SAT:code>_shift): Likewise.
	(arm_shiftsi3): Add alternative for 16-bit encoding.
	(arm32_movhf): Disable for arm_restrict_it.
	(arm_cmpdi_unsigned): Add alternatives for 16-bit encoding.
	(arm_movtas_ze): Disable cond_exec variant for arm_restrict_it.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201126 138bc75d-0d04-0410-961f-82ee72b054a4