Uploading images to the FPGA
Adding a new GPIF tester
Observed communication between the Host CPU and MCU

I set up an address that when written to will initialize the Debug
Logger. Unfortunately I noticed that the host doesn't pick up the debug
messages until the next session so I need to cycle the application
before I start seeing output.

I used the LED to verify communication and in the future this needs to
be removed.

I added two more registers that are really there just to exercise
reading and writing.

Now I can work through the COMM mode.