Implemented VMOVDQU32/VMOVDQA32/VMOVDQU64/VMOVDQA64 AVX512 instructions
Implemented VCOMISS/VCOMISD/VUCOMISS/VUCOMISD AVX512 instructions
Fix vector length values for AVX-512 (512-bit vector should have length 4)
support mis-alignment #GP exception for VMOVAPS/PD/DQA32/DQ64 AVX512 instructions
move AVX512 load/store and register move operations into dedicated file avx512_move.cc


git-svn-id: svn://svn.code.sf.net/p/bochs/code/trunk@11966 6c8e4198-a580-4521-a02f-c9ae86df1db9
fixed zmm reg name in disasm

git-svn-id: svn://svn.code.sf.net/p/bochs/code/trunk@11967 6c8e4198-a580-4521-a02f-c9ae86df1db9
fixed zmm reg name in disasm

git-svn-id: svn://svn.code.sf.net/p/bochs/code/trunk@11968 6c8e4198-a580-4521-a02f-c9ae86df1db9
fixed zmm reg name in disasm

git-svn-id: svn://svn.code.sf.net/p/bochs/code/trunk@11969 6c8e4198-a580-4521-a02f-c9ae86df1db9