Merging r195679:
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r195679 | rafael | 2013-11-25 12:15:14 -0800 (Mon, 25 Nov 2013) | 12 lines

Don't use nopl in cpus that don't support it.

Patch by Mikulas Patocka. I added the test. I checked that for cpu names that
gas knows about, it also doesn't generate nopl.

The modified cpus:
i686 - there are i686-class CPUs that don't have nopl: Via c3, Transmeta
        Crusoe, Microsoft VirtualBox - see
        https://bbs.archlinux.org/viewtopic.php?pid=775414
k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs
via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that
        Via c3 and c3-Nehemiah don't have nopl
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Merging r195716:
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r195716 | kevinqin | 2013-11-25 19:26:47 -0800 (Mon, 25 Nov 2013) | 3 lines

Refactored the implementation of AArch64 NEON instruction ZIP, UZP
and TRN.
Fix a bug when mixed use of vget_high_u8() and vuzp_u8().
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Merging r195731:
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r195731 | rsandifo | 2013-11-26 10:53:16 +0000 (Tue, 26 Nov 2013) | 7 lines

[SystemZ] Fix incorrect use of RISBG for a zero-extended right shift

We would wrongly transform the testcase into the equivalent of an AND with 1.
The problem was that, when testing whether the shifted-in bits of the right
shift were significant, we used the width of the final zero-extended result
rather than the width of the shifted value.

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Merging r195632:
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r195632 | tnorthover | 2013-11-25 01:52:59 -0800 (Mon, 25 Nov 2013) | 3 lines

X86: enable AVX2 under Haswell native compilation

Patch by Adam Strzelecki
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Merging r195343:
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r195343 | dsanders | 2013-11-21 03:40:14 -0800 (Thu, 21 Nov 2013) | 5 lines

[mips][msa/dsp] Only do DSP combines if DSP is enabled.

Fixes a crash (null pointer dereferenced) when MSA is enabled.


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Merging r195364:
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r195364 | dsanders | 2013-11-21 08:11:31 -0800 (Thu, 21 Nov 2013) | 12 lines

[mips][msa] Fix a corner case in performORCombine() when combining nodes into VSELECT.

Mask == ~InvMask asserts if the width of Mask and InvMask differ.
The combine isn't valid (with two exceptions, see below) if the widths differ
so test for this before testing Mask == ~InvMask.

In the specific cases of Mask=~0 and InvMask=0, as well as Mask=0 and
InvMask=~0, the combine is still valid. However, there are more appropriate
combines that could be used in these cases such as folding x & 0 to 0, or
x & ~0 to x.


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Merging r195444:
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r195444 | dsanders | 2013-11-22 03:24:50 -0800 (Fri, 22 Nov 2013) | 4 lines

[mips][msa] Float vector constants cannot use ldi.[wd] directly. Bitcast from the appropriate integer vector type.

Fixes an instruction selection failure detected by llvm-stress.

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Merging r195456:
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r195456 | dsanders | 2013-11-22 05:22:52 -0800 (Fri, 22 Nov 2013) | 4 lines

Fix typo in a comment added in r195455.

Credit to Matheus Almeida for spotting it.

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Merging r195469:
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r195469 | dsanders | 2013-11-22 07:47:18 -0800 (Fri, 22 Nov 2013) | 4 lines

[mips][msa] Add test case that should have been added in r195456.



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Merging r195682:
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r195682 | rafael | 2013-11-25 12:46:18 -0800 (Mon, 25 Nov 2013) | 1 line

Use -triple to fix the test on non-ELF hosts.
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Merging r195684:
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r195684 | rafael | 2013-11-25 12:50:03 -0800 (Mon, 25 Nov 2013) | 3 lines

Do the string comparison in the constructor instead of once per nop.

Thanks to Roman Divacky for the suggestion.
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Merging r195713:
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r195713 | kevinqin | 2013-11-25 18:33:42 -0800 (Mon, 25 Nov 2013) | 1 line

[AArch64]Implement 128 bit register copy with NEON.
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Merging r195408:
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r195408 | jiangning | 2013-11-21 18:45:13 -0800 (Thu, 21 Nov 2013) | 2 lines

For AArch64 back-end instruction selection, lower Neon_Lowxxx with EXTRCT_SUBREG.

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Merging r195424:
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r195424 | haoliu | 2013-11-22 00:47:22 -0800 (Fri, 22 Nov 2013) | 4 lines

Fix the bugs about AArch64 Load/Store vector types and bitcast between i64 and vector types.
e.g. "%tmp = load <2 x i64>* %ptr" can't be selected. 
     "%tmp = bitcast i64 %in to <2 x i32>" can't be selected.

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Add a release note about OCaml bindings.

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Merging r195769:
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r195769 | dyatkovskiy | 2013-11-26 08:11:03 -0800 (Tue, 26 Nov 2013) | 27 lines

PR17925 bugfix.

Short description.

This issue is about case of treating pointers as integers.
We treat pointers as different if they references different address space.
At the same time, we treat pointers equal to integers (with machine address
width). It was a point of false-positive. Consider next case on 32bit machine:

void foo0(i32 addrespace(1)* %p)
void foo1(i32 addrespace(2)* %p)
void foo2(i32 %p)

foo0 != foo1, while
foo1 == foo2 and foo0 == foo2.

As you can see it breaks transitivity. That means that result depends on order
of how functions are presented in module. Next order causes merging of foo0
and foo1: foo2, foo0, foo1
First foo0 will be merged with foo2, foo0 will be erased. Second foo1 will be
merged with foo2.
Depending on order, things could be merged we don't expect to.

The fix:
Forbid to treat any pointer as integer, except for those, who belong to address space 0.


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Merging r195773:
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r195773 | nadav | 2013-11-26 09:29:19 -0800 (Tue, 26 Nov 2013) | 6 lines

PR18060 - When we RAUW values with ExtractElement instructions in some cases
we generate PHI nodes with multiple entries from the same basic block but
with different values. Enabling CSE on ExtractElement instructions make sure
that all of the RAUWed instructions are the same.


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Merging r195791:
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r195791 | nadav | 2013-11-26 14:24:25 -0800 (Tue, 26 Nov 2013) | 4 lines

PR1860 - We can't save a list of ExtractElement instructions to CSE because some of these instructions
may be removed and optimized in future iterations. Instead we save a list of basic blocks that we need to CSE.


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Merging r195779:
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r195779 | hliao | 2013-11-26 12:31:31 -0800 (Tue, 26 Nov 2013) | 7 lines

Fix PR18054

- Fix bug in (vsext (vzext x)) -> (vsext x) in SIGN_EXTEND_IN_REG
  lowering where we need to check whether x is a vector type (in-reg
  type) of i8, i16 or i32; otherwise, that optimization is not valid.


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Merging r195148:
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r195148 | rafael | 2013-11-19 11:52:52 -0800 (Tue, 19 Nov 2013) | 15 lines

Support multiple COFF sections with the same name but different COMDAT.

This is the first step to fix pr17918.

It extends the .section directive a bit, inspired by what the ELF one looks
like. The problem with using linkonce is that given

.section foo
.linkonce....

.section foo
.linkonce

we would already have switched sections when getting to .linkonce. The cleanest
solution seems to be to add the comdat information in the .section itself.
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