Change the implementation of sincos and sincosf.

Before that sincos and sincosf had been implemented as
consecutive calls of sin and cos which led GCC to optimize
these calls into sincos/sincosf back again. To avoid that
sincos.c had been forced to be compiled with "O0". This
implementation prevents the infinite recursion; It is created as
a mixture of src/s_sin.c, src/s_cos.c and src/s_sinf.c, src/s_cosf.c
respectively.

Change-Id: I0f7a537a0d3f8f61cb28783315f30697d9d641a9
Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
libc: Replaced O(n^2) strstr with O(n)

Took it from glibc.

Change-Id: Ide8866a8db81c3df99ebae65a0c35fe1a34679ce
libc: strien update
libc: new CPU flag
libc: linario optimizations
Adding strcmp tuned for Cortex-A15.

The attached patch provides a new implementation of strcmp for ARM,
using LDRD instead of LDR whenever possible.

For older architectures that do not support LDRD, this implementation
uses the same algorithm as before.

Testing and benchmarking:
* Validation: successfully passes a test that compares different strings
of length 1-128 and offsets 0-8 from a word boundary. Checked on
qemu/A15/A9, ARM/Thumb mode, Big/Little Endian.
* Integration with gcc: no regression on qemu for arm-none-eabi --with-cpu
a15/a9 --with-mode arm/thumb.

Change-Id: I9e230e1b99dbdc9119b69ee858a89038c516a4ea
Signed-off-by: Vassilis Laganakos <vasileios.laganakos@arm.com>
Add __aeabi_idiv to the dummy reference list.

If the platform code is compiled with -mcpu=cortex-a15, then without this
change prebuilt libraries built against -march=armv7 cannot resolve the
dependency on __aeabi_idiv (provided by libgcc.a).

Bug: 7961327

cherry-picked from internal master.

Change-Id: I8fe59a98eb53d641518b882523c1d6a724fb7e55