Added MONO_API macro to annotate and control visibility of public (exported) APIs.

This is especially useful for Windows since this way there is no need to maintain a separate .def file with exports which is usually out-of-sync with the latest revisions. This could also be used to control visibility with GCC/Clang so there would be no need for MONO_INTERNAL (could be removed while changing the default visibility to hidden).
Faster index lookup in RemoveInternal
Merge pull request #722 from JulianHamilton/master

Faster index lookup in RemoveInternal
Merge pull request #681 from tritao/dll-api

Added public API visibility macros
Variable has_ld was renamed
Remove the #error for the ARM_FPU_VFP_HARD case.
Add an IS_HARD_FLOAT macro to the ARM back end.

Also define correct values for IS_SOFT_FLOAT and IS_VFP for
the hardware floating point (ARM_FPU_VFP_HARD) case.
Expand MonoContext on ARM to hold 32 double-precision registers.

This is necessary for VFP v3 D32 systems.
Add detection of VFP v3 variants to mono-hwcap-arm.
Remove some leftover FPA code.
Adjust various FP register values for hard float in mini-arm.h.
Add helper functions to the ARM back end to determine hard float and VFP registers.
Support VFP v3 variants of ARM_FLDMD and ARM_FSTMD.

Previously, we set the D bit of these instructions to Fd & 1. This
was incorrect. The D bit should only be set if we're referring to
the extra double-precision registers in VFP v3.

Take for example the instruction:

    vstmia r0, {d18-d20}

This is encoded by the GNU assembler to:

    1110 110 0 1 1 0 0 0000 0010 1011 00000110
                 |          |
                 D          Vd

The Vd is set to 2, i.e. register d2. However, we want to refer to
the d18 register, which is why the D bit is set. The CPU concats
the D bit with the four Vd bits to get 0b10010, which is 18.

However, if we do:

    vstmia r0, {d2-d4}

We get:

    1110 110 0 1 0 0 0 0000 0010 1011 00000110
                 |          |
                 D          Vd

The only difference is that the D bit is not set. This is because
the four Vd bits are enough to refer to the 16 base double-precision
registers in VFP.
Various fixes to VFP register saving in the ARM exception code.

* Adapt calls to ARM_FSTMD and ARM_FLDMD to the new D bit parameter.
* Save VFP registers based on what we detect about the hardware we
  run on, rather than basing the decision on ARM_FPU_* defines. This
  is important, because while ARM_FPU_VFP may be set, we may end up
  falling back to soft float.
* Save all 32 double-precision registers if the hardware supports
  the VFP v3 D32 variant.
* Add missing VFP register saving to mono_arm_resume_unwind ().
Add VFP register saving to trampolines.