DMA: AT91: Get transfer width

In one dma transfer, the data transfer width can be configured and it is limited by source or destination peripheral width,
tx_width will save the transfer width, but for memcpy, either source or destination transfer width is taken as tx_width.

Signed-off-by: Elen Song <elen.song@atmel.com>
DMA: AT91: Get residual bytes in dma buffer

Add support for returning the residue for current transfer cookie by
reading the transfered buffer size(BTSIZE) in CTRLA register.

For a single buffer cookie, the descriptor length minus BTSIZE
can get the residue.

For a lli cookie, remain_desc will record remain descriptor length
when last descriptor finish, the remain_desc minus BTSIZE can get the
current residue.

If the cookie has completed successfully, the residue will be zero.
If the cookie is in progress, it will be the number of bytes yet to be transferred.
If get residue error, the cookie will be turn into error status.

Check dma fifo to see if data remain, let issue pending finish remain work if there is.
Signed-off-by: Elen Song <elen.song@atmel.com>
ARM: at91: dt: add header to define at_hdmac configuration

DMA-cell content is a concatenation of several values. In order to keep this
stuff human readable, macros are introduced.

The values for the FIFO configuration are not the same as the ones used in the
configuration register in order to keep backward compatibility. Most devices
use the half FIFO configuration but USART ones have to use the ASAP
configuration. This parameter was not initially planed to be into the at91 dma
dt binding. The third cell will be used to store this parameter, it will
become a concatenation of the FIFO configuration and of the peripheral ID. In
order to keep backward compatibility i.e. FIFO configuration is equal to 0, we
have to perform a translation since the value to put in the register to set
half FIFO is 1.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
at_hdmac: add FIFO configuration parameter to DMA DT binding

For most devices the FIFO configuration is the same i.e. when half FIFO size is
available/filled, a source/destination request is serviced. But USART devices
have to do it when there is enough space/data available to perform a single
AHB access so the ASAP configuration.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
serial: at91: correct definition from DMA to PDC

True DMA is available only since at91sam9x5. Before, we were using PDC so some
variable names were wrong.

Signed-off-by: Elen Song <elen.song@atmel.com>
serial: at91: add tx dma support

Request a slave dma channel for tx dma use. Tx dma will setup a single transfer,
when transfer complete, it will call atmel_dma_tx_complete to do finish stuff.

Signed-off-by: Elen Song <elen.song@atmel.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
serial: at91: add rx dma support

Request a cyclic dma channel for rx dma use. Use cyclic transfer is to prevent
receive data overrun.

atmel_allocate_desc will allocate a cycle dma cookie after request channel,
after that, enable uart timeout interrupt in startup stage, when data successful
received, the timeout callback will check the residual bytes and insert
receiving datas into the framework during the transfer interval.

When current descriptor finished, the dma callback will also check the residual
bytes and filp the receiving data.

Signed-off-by: Elen Song <elen.song@atmel.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
serial: at91: make DBGU support dma and pdc transfers

Because the DBGU lack of receive timeout register, so we use a timer to trigger
data receive.

Signed-off-by: Elen Song <elen.song@atmel.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
ARM: at91: dts: add USART dma configurations for sama5d3x

The rx channel must use ASAP as FIFO configuration.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
serial: at91: distinguish usart and uart

Distinguish usart and uart by read ip name register,
dbgu regards as uart.

Signed-off-by: Elen Song <elen.song@atmel.com>
serial: at91: modify UART to use software timer to trigger rx

Signed-off-by: Elen Song <elen.song@atmel.com>
at_hdmac: identify DMA_PREP_INTERRUPT flag

DMA_PREP_INTERRUPT trigger an interrupt (callback) upon completion of this
transaction, declare it in at_hdmac.c to trigger callback.

Signed-off-by: Elen Song <elen.song@atmel.com>
ARM: at91: dts: add UART dma configurations for sama5d3x

Signed-off-by: Elen Song <elen.song@atmel.com>