Add missing -*- C++ -*- to headers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182164 91177308-0d34-0410-b5e6-96231b3b80d8
Replace redundant code

Use EVT::changeExtendedVectorElementTypeToInteger instead of doing the
same thing that it does

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182165 91177308-0d34-0410-b5e6-96231b3b80d8
Fix the build in c++11 mode.

The errors were:

non-constant-expression cannot be narrowed from type 'int64_t' (aka 'long') to 'uint32_t' (aka 'unsigned int') in initializer list

and

non-constant-expression cannot be narrowed from type 'long' to 'uint32_t' (aka 'unsigned int') in initializer list

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182168 91177308-0d34-0410-b5e6-96231b3b80d8
Convert obj2yaml to use yamlio.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182169 91177308-0d34-0410-b5e6-96231b3b80d8
Fix the configure build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182172 91177308-0d34-0410-b5e6-96231b3b80d8
Support unaligned load/store on more ARM targets

This patch matches GCC behavior: the code used to only allow unaligned
load/store on ARM for v6+ Darwin, it will now allow unaligned load/store
for v6+ Darwin as well as for v7+ on Linux and NaCl.

The distinction is made because v6 doesn't guarantee support (but LLVM
assumes that Apple controls hardware+kernel and therefore have
conformant v6 CPUs), whereas v7 does provide this guarantee (and
Linux/NaCl behave sanely).

The patch keeps the -arm-strict-align command line option, and adds
-arm-no-strict-align. They behave similarly to GCC's -mstrict-align and
-mnostrict-align.

I originally encountered this discrepancy in FastIsel tests which expect
unaligned load/store generation. Overall this should slightly improve
performance in most cases because of reduced I$ pressure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182175 91177308-0d34-0410-b5e6-96231b3b80d8
Add LLVMContext argument to getSetCCResultType

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182180 91177308-0d34-0410-b5e6-96231b3b80d8
Remove duplicated comment

The same comment is already made in the header

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182181 91177308-0d34-0410-b5e6-96231b3b80d8
X86: Bad peephole interaction between adc, MOV32r0

The peephole tries to reorder MOV32r0 instructions such that they are
before the instruction that modifies EFLAGS.

The problem is that the peephole does not consider the case where the
instruction that modifies EFLAGS also depends on the previous state of
EFLAGS.

Instead, walk backwards until we find an instruction that has a def for
EFLAGS but does not have a use.
If we find such an instruction, insert the MOV32r0 before it.
If it cannot find such an instruction, skip the optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182184 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64: add CMake dependency to fix very parallel builds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182190 91177308-0d34-0410-b5e6-96231b3b80d8
Check InlineAsm clobbers in PPCCTRLoops

We don't need to reject all inline asm as using the counter register (most does
not). Only those that explicitly clobber the counter register need to prevent
the transformation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182191 91177308-0d34-0410-b5e6-96231b3b80d8
Add basic support for ELF32-ppc relocations to llvm-dwarfdump.

Should help the ppc32 buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182194 91177308-0d34-0410-b5e6-96231b3b80d8
docs/Passes: fix some typos

Patch by Yacine Belkadi.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182197 91177308-0d34-0410-b5e6-96231b3b80d8
LoopVectorize: Handle single edge PHIs

We might encouter single edge PHIs - handle them with an identity select.

Fixes PR15990.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182199 91177308-0d34-0410-b5e6-96231b3b80d8
isKnownToBeAPowerOfTwo: (X & Y) + Y is a power of 2 or zero if y is also.

This is useful if something that looks like (x & (1 << y)) ? 64 : 32 is
the divisor in a modulo operation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182200 91177308-0d34-0410-b5e6-96231b3b80d8
Unsupported remote JIT on ARM

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182201 91177308-0d34-0410-b5e6-96231b3b80d8
Print uint64_t -debug text correctly on 32-bit hosts

On 32-bit hosts %p can print garbage when given a uint64_t, we should
use %llx instead. This only affects the output of the debugging text
produced by lli.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182209 91177308-0d34-0410-b5e6-96231b3b80d8
Move the remaining simplify-libcalls tests to instcombine, merging most of them into a single file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182211 91177308-0d34-0410-b5e6-96231b3b80d8
Temporarily disable this test because it is failing when using libc++.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182212 91177308-0d34-0410-b5e6-96231b3b80d8
Invalidate instruction cache when setting memory to be executable.

lli's remote MCJIT code calls setExecutable just prior to running
code. In line with Darwin behaviour this seems to be the place to
invalidate any caches needed so that relocations can take effect
properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182213 91177308-0d34-0410-b5e6-96231b3b80d8