new file:   Latex/1 projekt/xspank00-fit/makefile
	new file:   Latex/1 projekt/xspank00-fit/proj1.aux
	new file:   Latex/1 projekt/xspank00-fit/proj1.dvi
	new file:   Latex/1 projekt/xspank00-fit/proj1.log
	new file:   Latex/1 projekt/xspank00-fit/proj1.pdf
	new file:   Latex/1 projekt/xspank00-fit/proj1.ps
	new file:   Latex/1 projekt/xspank00-fit/proj1.tex
	new file:   Latex/2 projekt/xspank00-fit/makefile
	new file:   Latex/2 projekt/xspank00-fit/makefile~
	new file:   Latex/2 projekt/xspank00-fit/proj2.aux
	new file:   Latex/2 projekt/xspank00-fit/proj2.log
	new file:   Latex/2 projekt/xspank00-fit/proj2.pdf
	new file:   Latex/2 projekt/xspank00-fit/proj2.synctex.gz
	new file:   Latex/2 projekt/xspank00-fit/proj2.tex
	new file:   Latex/2 projekt/xspank00-fit/proj2.tex~
	new file:   Latex/3 projekt/xspank00-fit/etiopan.eps
	new file:   Latex/3 projekt/xspank00-fit/makefile
	new file:   Latex/3 projekt/xspank00-fit/oniisan.eps
	new file:   Latex/3 projekt/xspank00-fit/oniisan2.eps
	new file:   Latex/3 projekt/xspank00-fit/proj3.aux
	new file:   Latex/3 projekt/xspank00-fit/proj3.dvi
	new file:   Latex/3 projekt/xspank00-fit/proj3.log
	new file:   Latex/3 projekt/xspank00-fit/proj3.tex
	new file:   Latex/4 projekt/xspank00-fit/citace.bib
	new file:   Latex/4 projekt/xspank00-fit/kodovani.bst
	new file:   Latex/4 projekt/xspank00-fit/makefile
	new file:   Latex/4 projekt/xspank00-fit/proj4.aux
	new file:   Latex/4 projekt/xspank00-fit/proj4.bbl
	new file:   Latex/4 projekt/xspank00-fit/proj4.blg
	new file:   Latex/4 projekt/xspank00-fit/proj4.dvi
	new file:   Latex/4 projekt/xspank00-fit/proj4.log
	new file:   Latex/4 projekt/xspank00-fit/proj4.pdf
	new file:   Latex/4 projekt/xspank00-fit/proj4.ps
	new file:   Latex/4 projekt/xspank00-fit/proj4.tex
	new file:   VHDL/1 projekt/fpga/ledc8x8.ucf
	new file:   VHDL/1 projekt/fpga/ledc8x8.vhd
	new file:   VHDL/1 projekt/fpga/sim/isim.tcl
	new file:   VHDL/1 projekt/fpga/sim/ledc8x8_tb.vhd
	new file:   VHDL/1 projekt/mcu/main.c
	new file:   VHDL/1 projekt/project.xml
	new file:   VHDL/2 projekt/cpu.vhd
	new file:   VHDL/2 projekt/inp.png
	new file:   VHDL/2 projekt/inp.srp
	new file:   VHDL/2 projekt/login.b
Merge branch 'master' of https://github.com/JaroslavSpanko/Projects