rtl/memory: mask data with byte enables.

The data is rotated for the case of 8/16 bit reads so we need to mask
the resulting data so that the byte lanes that are not enabled are set
to zero.
rtl/debug: implement register writes.
rtl/fetch: update the PC for debug on every cycle.

We can't do this in the combinational logic as the write enable might
have gone low before we start executing.