I-cache overhaul

*  Reworked the I-cache, now that the CPU bus is more clear to me.
   This allowed me to delete a lot of duplication, and improve the
   efficiency of parts.  The result is about a 60% reduction of
   resource usage.

   The functionality is there, but the code still needs clean up.

*  Upgraded the startup stimulus in the CPU -- it now induces an
   artifical stall before the first instruction bus strobe, so that
   no bogus data is read into the pipeline before the cache produces
   data.  This worked by chance before, but with the cleaner bus
   interface and I-cache implementation, it no longer worked.