gles3: Update gl3.h

Contains a fix for Khronos bug 9557.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
nouveau: don't try to use push_data if it's not implemented
gallium/u_upload_mgr: fix a serious memory leak

It can eat all memory and crash in a matter of minutes with r600g.
gallivm: split sampler and texture state

Split the sampler interface to use separate sampler and texture (sampler_view)
state. This is needed to support dx10-style sampling instructions.
This is not quite complete since both draw/llvmpipe don't really track
textures/samplers independently yet, as well as the gallivm code not quite
using the right sampler or texture index respectively (but it should work
for the sampling codes used by opengl).
We are however losing some optimizations in the process, apply_max_lod will
no longer work, and we potentially could end up with more (unnecessary)
recompiles (if switching textures with/without mipmaps only so it shouldn't
be too bad).

v2: don't use different callback structs for sampler/sampler view functions
(which just complicates things), fix up sampling code to actually use the
right texture or sampler index, and similar for llvmpipe/draw actually
distinguish between samplers and sampler views.

v3: fix more of PIPE_MAX_SAMPLER / PIPE_MAX_SHADER_SAMPLER_VIEWS mismatches
(both in draw and llvmpipe), based on feedback from José get rid of unneeded
static sampler derived state.(which also fixes the only 2 piglit regressions
due to a forgotten assignment), fix comments based on Brian's feedback.

v4: remove some accidental unrelated whitespace changes

Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
gallivm,draw,llvmpipe: mass rename of unit->texture_unit/sampler_unit

Make it obvious what "unit" this is (no change in functionality).
draw still uses "unit" in places where it changes the shader by adding
texture sampling itself - it seems like this can't work with shaders
using dx10-style sample opcodes (can't mix gl-style and dx10-style
sample instructions in a shader).

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
radeon/winsys: add dma ring support to winsys v3

Add ring support, you can create a cs for each ring. DMA ring is
bit special regarding relocation as you must emit as much relocation
as there is use of the buffer.

v2: - Improved comment on relocation changes
    - Use a single thread to queue cs submittion this simplify driver
      code while not impacting performances. Rational for this is that
      you have to wait for all previous submission to have completed
      so there was never a case while we could have 2 different thread
      submitting a command stream at the same time. This code just
      consolidate submission into one single thread per winsys.
v3: - Do not use semaphore for empty queue signaling, instead use
      cond var. This is because it's tricky to maintain an even number
      of call to semaphore wait and semaphore signal (the number of
      cs in the stack would for instance make that number vary).

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
r600g: add multi ring support with dma as first second ring v4

We keep track of ring emission order in a stack, whenever we need to
flush we empty the stack in a fifo order. There is few helpers function
for bo mapping and other ring activities that will make sure that
the ring stack is properly flush and submitted.

v2: fix st flush path, and other flush path to properly flush all
    rings if necessary
v3: - improve name of ring helpers
    - make sure that each time a cs is gona be written it endup at
      top of the stack to avoid any issue such as :
      STACK[0] = dma (withbo A,B)
      STACK[1] = gfx (withbo C,D)
      Now if code try to emit a dma command relative to bo C or D
      it will start writting cmd stream into the cs and once it
      reach the point where it adds relocation it will flush.
      At that point the cs will have cmd that don't have proper
      relocation into the relocation buffer and kernel will just
      refuse to run.
v4: - Drop the stack idea as it turn out there is no way to use it
      or benefit from it. Any time the driver start command on other
      ring, it always need to flush the previous ring. So make code
      simpler by not using a stack.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
r600g: add async for staging buffer upload v2

v2: Add virtual address to dma src/dst offset for cayman

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
r600g: don't emit WAIT_UNTIL on cayman/TN (v2)

It shouldn't be needed and older kernels don't support
it.

v2: Replace with PS partial flush as before.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=59945

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
r600g: Fix building with --enable-r600-llvm-compiler

https://bugs.freedesktop.org/show_bug.cgi?id=59877
r600g/llvm: Add dummy export for vs output

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=59588

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
r600g: More robust checks for MOVA_INT instructions
r600g: Add ar_chan member to struct r600_bytecode

r600_bytecode::ar_chan stores the register channel for the value that
will be loaded into the AR register.

At the moment, this field is only used by the LLVM backend.  The default
backend always sets ar_chan = 0.
r600g: improve inputs/interpolation handling with llvm backend

Get rid of special handling for reserved regs.
Use one intrinsic for all kinds of interpolation.

v2[Vincent Lejeune]: Rebased against current master

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
glx: only advertise GLX_INTEL_swap_event if it's supported

Only drivers supporting DRI2 version >=4 support GLX_INTEL_swap_event.
So lets mark it as such otherwise applications which use this extension
(i.e. everything based on Clutter, e.g. gnome-shell) break horribly on
drivers supporting DRI2 versions only up to 3.

Note: This is a candidate for the 9.0 branch.

Reviewed-by: Brian Paul <brianp@vmware.com>
r600g: fix segfault with old kernel

Old kernel do not have dma support, patch pushed were missing some
of the check needed to not use dma.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
intel: Typo fix: "pitsh" -> "pitch"

Comment change only.
android: use gralloc_drm_get_gem_handle api

Currently a gralloc internal structure is exposed to Mesa,
Use a query function instead to maintain ABI compatibility.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
i965: Fix assignment instead of comparison in asserts.

Fixes side effect in assertion defects reported by Coverity.

Note: This is a candidate for the 9.1 branch.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
r600g: real fix for non 3.8 kernel

Signed-off-by: Jerome Glisse <jglisse@redhat.com>