i965/gen4: Work around missing sRGB RGB DXT1 support.

The hardware just doesn't support it.  I suspect this was a regression from
the move to fixed MESA_FORMATs for compressed textures and that previously we
were storing uncompressed for this or something.

Fixes GPU hangs in piglit "texwrap GL_EXT_texture_sRGB-s3tc bordercolor
swizzled" on my GM965.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Re-enable the -RHW workaround for original gen4 chips.

Fixes broken clipping in supertuxkart and presumably many other applications.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51471
NOTE: Candidate for the stable branches.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
configure.ac: Add components to LLVM_COMPONENTS when using llvm shared libs

This is required when LLVM is built with CMake, which creates one
shared library for each component.
shaderapi: Fix AttachShader error

Detect a duplicate Shader type as and error instead of silently allowing
it, restrict to ES2 API.

v2: Tapani Pälli <tapani.palli@intel.com>
    - make the check run time instead of compile time

v3: chadv
    - Quote spec on which error to generate.

Signed-off-by: bma <Bo.Ma@windriver.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-and-tested-by: Chad Versace <chad.versace@linux.intel.com>
i965/fs: Use a helper function for checking for flow control instructions.

In 2 of our checks, we were missing BREAK and CONTINUE.

NOTE: Candidate for the stable branches.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Remove writemask support from brw_SAMPLE().

The code was rather broken for non-XYZW on 8-wide, but all of our
callers were using XYZW anyway.  For my experiments with using writemask
on texturing, I've been using manual header setup in the compiler
backends, since we want to actually know what registers are written for
optimization and register allocation.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
intel: Allow blit readpixels even when the pack alignment is set.

The default alignment is 4, so this fast path was rarely hit.  Rather
than introduce logic to handle alignment, just use the Mesa core
function.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46632
Cc: neil@linux.intel.com
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
glsl: Initialize ir_texture member variable.

Fixes uninitialized pointer field defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
radeonsi: Fix array indices for detecting integer vertex formats
radeonsi: Handle TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS

8 more little piglits.

NOTE: This is a candidate for the 9.1 branch.
r600g: properly implement S8Z24 depth-stencil format for Evergreen

I should say "fix", but it has never been used until now.
S8Z24 is the format equivalent to the GL_UNSIGNED_INT_24_8 packing,
so we'll start to see it more often with st/mesa now making smart decisions
about formats.

The DB<->CB copy can change the channel ordering for transfers, other than
that, the internal DB format doesn't really matter.

R600-R700 support is possible except shadow mapping.
FMT_24_8 is broken if the SAMPLE_C instruction is used (no idea why).

Also the sampler swizzling was broken in theory and the fact it worked was
a lucky coincidence.

radeonsi might need to port this.

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
st/mesa: try to find exact format matching user format and type for DrawPixels

Reviewed-by: Brian Paul <brianp@vmware.com>
r300g: add support for red-alpha render targets
r600g: add support for red-alpha render targets
i965/gen7: Set up all samplers even if samplers are sparsely used.

In GLSL, sampler indices are allocated contiguously from 0.  But in the
case of ARB_fragment_program (and possibly fixed function), an app that
uses texture 0 and 2 will use sampler indices 0 and 2, so we were only
allocating space for samplers 0 and 1 and setting up sampler 0.  We
would read garbage for sampler 2, resulting in flickering textures and
an angry simulator.

Fixes bad rendering in 0 A.D. and ETQW.  This was fixed for pre-gen7 by
28f4be9eb91b12a2c6b1db6660cca71a98c486ec

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=25201
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58680
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
NOTE: This is a candidate for stable branches.
egl-wayland: Fix left-over wl_display_roundtrip() usage

We have to use the EGL wayland event queue for roundtrip, so use the
wayland_roundtrip() helper, which does just that.
i965/fs: Do a general SEND dependency workaround for the original 965.

We'd been ad-hoc inserting instructions in some SEND messages with no
knowledge of when it was required (so extra instructions), but not all SENDs
(so not often enough).  This should do much better than that, though it's
still flow-control-ignorant.

v2: Use BRW_MAX_MRF instead of magic numbers.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58960
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
NOTE: Candidate for the stable branches.
draw/gs: fix allocation of buffer for GS output vertices

Before, it accounted for the size of the vertices but not the other fields
in the vertex_header struct, which caused memory corruption.
mesa: add EXT_geometry_shader4 and ARB_geometry_shader4 to extension list
mesa: account for geometry shader texture fetches in update_texture_state