i965/gs: Allocate URB space for use by geometry shader.

Previously, we gave all of the URB space (other than the small amount
that is used for push constants) to the vertex shader.  However, when
a geometry shader is active, we need to divide it up between the
vertex and geometry shaders.

The size of the URB entries for the vertex and geometry shaders can
vary dramatically from one shader to the next.  So it doesn't make
sense to simply split the available space in two.  In particular:

- On Ivy Bridge GT1, this would not leave enough space for the worst
  case geometry shader, which requires 64k of URB space.

- Due to hardware-imposed limits on the maximum number of URB entries,
  sometimes a given shader stage will only be capable of using a small
  amount of URB space.  When this happens, it may make sense to
  allocate substantially less than half of the available space to that
  stage.

Our algorithm for dividing space between the two stages is to first
compute (a) the minimum amount of URB space that each stage needs in
order to function properly, and (b) the amount of additional URB space
that each stage "wants" (i.e. that it would be capable of making use
of).  If the total amount of space available is not enough to satisfy
needs + wants, then each stage's "wants" amount is scaled back by the
same factor in order to fit.

When only a vertex shader is active, this algorithm produces
equivalent results to the old algorithm (if the vertex shader stage
can make use of all the available URB space, we assign all the space
to it; if it can't, we let it use as much as it can).

In the future, when we need to support tessellation control and
tessellation evaluation pipeline stages, it should be straightforward
to expand this algorithm to cover them.
i965/gs: Allocate push constant space.

Previously, we would always use the same push constant allocation
regardless of what shader programs were being run: the available push
constant space was split into 2 equal size partitions, one for the
vertex shader, and one for the fragment shader.

Now that we are adding geometry shader support, we need to do
something smarter.  This patch adjusts things so that when a geometry
shader is in use, we split the available push constant space into 3
nearly-equal size partitions instead of 2.

Since the push constant allocation is now affected by GL state, it can
no longer be set up by brw_upload_initial_gpu_state(); instead it must
be set up by a state atom.
i965: Make sure constants re-sent after constant buffer reallocation.

The hardware requires that after constant buffers for a stage are
allocated using a 3DSTATE_PUSH_CONSTANT_ALLOC_{VS,HS,DS,GS,PS}
command, and prior to execution of a 3DPRIMITIVE, the corresponding
stage's constant buffers must be reprogrammed using a
3DSTATE_CONSTANT_{VS,HS,DS,GS,PS} command.

Previously we didn't need to worry about this, because we only
programmed 3DSTATE_PUSH_CONSTANT_ALLOC_{VS,HS,DS,GS,PS} once on
startup.  But now that we reallocate the constant buffers whenever
geometry shaders are switched on and off, we need to make sure the
constant buffers are reprogrammed.

We do this by adding a new bit, BRW_NEW_PUSH_CONSTANT_ALLOCATION, to
brw->state.dirty.brw.
i965/vs: generalize push const upload in preparation for GS.
i965/gs: set up GS state.
!UPSTREAM ===== END of preliminary back-end work =====
!UPSTREAM: glsl: During linking, record whether a GS uses EndPrimitive().

This information will be useful in the i965 back end.

TODO:
- Test
i965/gs: Set control data header size/format appropriately for EndPrimitive().

The gen7 geometry shader uses a "control data header" portion of the
output URB entry to store either

(a) flag bits (1 bit/vertex) indicating whether EndPrimitive() was
    called after each vertex, or

(b) stream ID bits (2 bits/vertex) indicating which stream each vertex
    should be sent to (when multiple transform feedback streams are in
    use).

This patch modifies do_vec4_gs_prog() to determine the correct
hardware settings for configuring the control data header, and
modifies upload_gs_state() to propagate these settings to the
hardware.

In addition, it modifies do_vec4_gs_prog() to ensure that the output
URB entry is large enough to contain both the output vertices *and*
the control data header.
i965/gen7: Allow URB_WRITE channel masks to be used.

Previously, brw_urb_WRITE() would unconditionally override the channel
masks in the URB_WRITE message to 0xff (indicating that all channels
should be written to the URB).

For geometry shaders, we need the ability to set the channel masks
programatically, so create a flag to prevent brw_urb_WRITE() from
overriding them.
i965/gen7: Add the ability to send URB_WRITE_OWORD messages.

This will be used by geometry shaders to implement EndPrimitive()
functionality.
i965/gs: Add opcodes needed for EndPrimitive().
i965/vec4: Add the ability to emit opcodes with just a dst register.

This is needed for GS_OPCODE_PREPARE_CHANNEL_MASKS.
i965/gs: implement EndPrimitive() functionality in the visitor.
!UPSTREAM: i965/gs: Generalize some error messages for GS.

TODO: find more places to generalize.
TODO: Don't use "VS/GS" terminology.  Use "vec4" terminology, since that will endure longer.
!UPSTREAM: GS sampling fixes 1
!UPSTREAM: GS sampling fixes 2

TODO:
- Move later
!UPSTREAM: Fix GS sampling.

TODO:

- Need to re-examine after Ken's re-work

- Seems like these functions ought to be rewritten to loop over
  program types.

- Handling of null gs seems clumsy.

- Can the same sampler be used in multiple shader stages (e.g. both VS
  and FS)?  If not, then it seems like we're going to run out of
  samplers in our bitfield.  If so, then is it guaranteed that
  fs->SamplerUnits[s] == gs->SamplerUnits[s]?  If so this needs an
  explanatory comment.  If not, this code seems broken.

- Decide what to do about code duplication.  Either I should de-dup
  the code or I suppose I should only update the gen7 code.

- Move to appropriate place in the series.
!UPSTREAM: Primitive ID part 1.
!UPSTREAM: Primitive ID part 2.
!UPSTREAM: Primitive ID part 3.