ramdisk: merge in latest cm ramdisk (0904)
Revert "kgsl: undo CM-10.2's updates to fix horrible memory leak"

This reverts commit 7b73f6f52d8a1791a61973cdf45e8e9bec8198f6.
msm_fb: display: Add compulsory wait after DTV's TG is disabled.

When DTV timing generator is disabled during dtv_off, a wait for
at least a frame period is required. This is done by waiting on
vsync. In some scenarios, vsync interrupt is received such that, no
wait really happens which results in MDP hangs.
Add wait for 20ms after TG is disabled, to ensure wait for at least
a frame period. Also, print timeout error in case wait for vsync
times out.

Change-Id: I960326e495bc8dc108bf6c6f1994ea3071f1c06d
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
USB: EHCI:  Ensure 10 msec delay between bus states

According to EHCI specification, software must wait for at least 10 msec
after a port indicates that it is suspended before initiating a port
resume.  The current code uses jiffies and fails to give the delay if
suspend and resume happens at the timer tick boundaries.

The correct implementation would be ensuring this delay by using hrtimers
or ktime_get().  This involves changing many drivers.  Hence workaround
it by increasing the state change delay to 2 jiffies.

CRs-Fixed: 521047
Change-Id: I703210cca83d649d1b253e971dfba8f62c6ccb8c
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
msm: 8064-pmic: Update the maximum current supported by LEDs

LEDs on 8064 can support 12mA. Update the platform data
for LED to reflect the same.

CRs-fixed: 514882
Change-Id: I012051f63e39f90123373c78e4280bf008e1bbea
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
msm: spm: modify power collapse seq for kraitv3

High sleep current observed due to L2 cache not going into
power collapse in special cases.

While analyzing, a timing issue was found that can manifest itself when the
clamp signal is asserted during the Krait CPU1 power collapse sequence.
When it occurs, the issue causes an L2 FIFO to falsely believe that it
has data to return to CPU1 when it does not.The condition isnt detected until
later when CPU0 and the L2 attempt to collapse.

This condition keeps the L2 from going idle which keeps it from power
collapsing after both CPUs have collapsed.  This in turn prevents the
RPM from enabling a system low power state (VDD minimization).
The issue is likely process/temp/voltage dependent.

HW team recommended a workaround, the details are as below.

Add commands to the Krait CPU power collapse SPM sequences to assert
Krait CPU reset prior to asserting the CPU clamp signal and de-assert
CPU reset after the CPU clamp is asserted.
Since the CPU clocks are gated (by the first SPM command in the
sequence), and the clamp is applied, the Krait CPU will do nothing
when its reset is de-asserted.

The workaround involves changing both CPU power collapse SPM sequences
(Power Collapse with and without RPM notification).

CRs-fixed: 518750
Change-Id: I62c76f49a96a8cb6ecf67733ae9a7ff1a79a76f7
Signed-off-by: Venkat Devarasetty <vdevaras@codeaurora.org>
HSIC: Add support for product id 9075

Product Id 0x9075 includes DIAG, SER3(System monitor), SER4(EFS sync),
DUN, CSVT, NET1(Tethered RmNet) + NET2(Muxed Embedded RmNet) device
interfaces.

Change-Id: I75f61445af0ff9eab3d8f22bc2239011a9495e0e
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
usb: ks_bridge: Add efs sync support for PID 0x9075

Driver needs to claim efs sync interface for PID 0x9075
at the time of driver probe.

Change-Id: Idd637aa04eab7babe509a4fbfc3671555dcca189
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
power: pm8921-charger: Add delay after turning on D0 (TCXO) clock

On APQ8064, TCXO cannot be turned off before its warm-up period (4ms).
This is not required on the platform which have a CXO. Add a warm-up
delay after turning on D0 (which turns on the TCXO).

Change-Id: I252372c35a9fdfaf4a9fade1594936b05c1b5745
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>

Conflicts:

	include/linux/mfd/pm8xxx/pm8921-charger.h
msm: camera: prevent invalid access through mmap

Disable access to invalid addresses through mmap.
Add appropriate range checks to ensure valid accesses
through framebuffer mmap. This prevents illegal
access into memory.

Change-Id: Ie053d9d8efe951b88f28b020dd9c2356e54723a7
CRs-Fixed: 475794
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
CR : 519047 Display: Observed low fps while playing MxLauncher3D

Change-Id: I98d2058b7aa75222244442262bb750f2191fd685
Signed-off-by: Gayathri <gramai@codeaurora.org>
msm: camera: Enable AVTimer related APIs

Uncomment the code related to using AVTimer APIs to retrieve
TimeStamp information from QDSP.

CRs-fixed: 498762
Change-Id: I727f0d4219da2e9ccd5e88d18d1041a82abbb4cc
Signed-off-by: Alok Kediya <kediya@codeaurora.org>
ASoC: wcd9304: Fix DMIC current leakage after disable

Observed after disabling DMIC path, some DMICs observe
power leakage of around 2mA and affecting power numbers.
This happens due to the DMIC clock runs off MCLK. 2 Stage
of Dividers are used to  generate various DMIC Clock Freq.
Since the SW Enable/Disabling is async to MCLK, the Divider
will either hold the last stage 0 or 1.
Manually force the digital mic clock pin to GPIO mode from
functional mode through the TLMM mux option and force the value
of DMIC voltage to 0V. This will avoid any current leakage.

Change-Id: If676801df4e77047c85167453139541629f981d8
CRs-Fixed: 526779
Signed-off-by: johny <mjshai@codeaurora.org>
msm: display: Handle mixer stage commit for wfd correctly

If no dequeue buffer is present, do not return early as commit
call still needs to take care of  mixer staging and stage commit.
Early return of commit, results in pipe still staged errors since,
mixer stage and commit gets bypass.

Change-Id: I1aa7dc9e95d183b22739daae123cf7818afbeadd
CRs-Fixed:523959
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
HSIC: Add support for product id 908A

Product Id 0x908A includes DIAG, SER3(System monitor), SER4(EFS sync),
DUN, CSVT, NET2(Muxed Embedded RmNet) and IPCR (IPC router) device
interfaces.

Change-Id: I1eba520339c3aba40ff39eea76f3f8684b6ce1ca
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
USB: misc: Add IPC bridge driver

USB IPC bridge driver acts as a transport layer for the IPC router.
The IPC router provides communication between APPS processor and
MODEM processor.

This driver manages an interface that is similar to USB CDC control
interface.  A platform device with "ipc_bridge" name is created when
the MODEM USB is enumerated.  The platform data is populated with
open, read, write and close function pointers.  The suspend/resume
functionality is hidden from IPC router driver.  The driver supports
auto suspend and ensures that USB is not suspended when a write/read
request is in progress.  Platform device is unregistered when MODEM
USB is disconnected.  IPC router driver is expected to synchronize
I/O with disconnect and close the channel from platform device removal
context.

The driver currently supports only one instance of IPC bridge.  The
design is flexible and easily can be extended to support multiple
instances.

CRs-Fixed: 492801
Change-Id: Ida71a0d5d89d946c81eada8e9453cf55b2b06881
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
defconfig: msm8960: Enable USB HSIC IPC bridge driver

This driver works as a transport layer for the IPC router module that
enables interprocessor communication.

Change-Id: I568c0cea9cfd9595a79d2df59fa68625e82da92c
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
msm_fb:hdmi:Video playback failure issue

OEM reported Video playback failure
(before Video, Audio fails actually) issue,
because hdmi_msm_power_off() skips
SWITCH_SET_HDMI_AUDIO, hdmi_msm_audio_off()

Change-Id: I4db61a62217bc49741571f23703361d273648fee
Signed-off-by: Nirmal Abraham <nabrah@codeaurora.org>
msm: ipc: IPC Router updates to support QMI in the kernel

1) Move the kernel interface APIs to a separate header file.
2) Use platform device to indicate the arrival/exit of service.
3) Add kernel APIs to send and receive messages through IPC Router.
4) Clean up unused Macros, enums, header inclusion.

Change-Id: I1541e9815d104f7ea46d19c10b57c77d967bd065
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
lib: qmi: Introduce QMI Encode/Decode library

Introduce Encode/Decode Library to perform QMI message marshaling.
The QMI Encode/Decode Library encodes the kernel C data structures into
QMI wire format and decodes the messages in QMI wire format into kernel
C structures.

Change-Id: Ib443e697dafedeac8a790de9a3a8ed4a8444082f
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>