cpufreq: ondemand: Use the input handler when SEC_DVFS_BOOSTER isn't enabled

Change-Id: I8515fc6f258c6c2601c189291ee75d10fc623db2
drivers: cpufreq: Send a uevent when governor changes

 * Useful so userspace tools can reconfigure.

Change-Id: Ib423910b8b9ac791ebe81a75bf399f58272f64f2
msm: mdp: Revert MDP Port split changes

Revert MDP changes to avoid bus overflow
seen in camera usecases.

Change-Id: I1c687750bd22c8f64ab28a500562cbfbcb6a6048
Signed-off-by: Kiran Kumar H N <hurlisal@codeaurora.org>
Signed-off-by: Praveen Ac <praveenac@codeaurora.org>
msm_fb: display: get mipi frame rate from panel file

If frame rate value for mipi video panel is coded in panel file it can
be directly used to avoid calculation error.

Change-Id: I6ad86226c81da4bcf36196385f9ff4bea0bef0ca
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm_fb: display: add mdp clock control to histogram enable/disable

Add mdp clock control to histogram enable and disable block to
prevent system from crashing when accessing register with mdp
clocks off.

Change-Id: Ide808b332b5456f3fc639fcbb0d03d5cad0e387f
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
msm_serial_hs: Rx discard flush timeout

While configuring the uart buadrate using set_termios
function, timeout is occuring for rx discard flush
operation. This is due to the driver is waiting for
less time for the DMA call back to occur after programing
the DMA register with the discard flush command.

To overcome this issue increased the timeout to 300ms.

Change-Id: I60db1f9eea8bb59fab4024e5f5dfcbcdcde253bb
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm: rotator: Extend fast YUV invalid checker for 2-pass

For 2-pass mode, we need to check for the fast YUV constraints
separately for both the 1st and 2nd pass. Make change to extend
the fast YUV invalid checker to 2-pass mode.

CRs-fixed: 504007
Change-Id: I7ef96ff29423fbd5cc454e8fd125b4bb1a9d59e1
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>