Armjit: add reverse bit instruction.
Quick build fix
Turn down sceGeContinue and sceGeBreak log level.
We know them and they're mostly used by our own debug overlay.
Minor stuff: Fake-implement sceKernelReferThreadProfiler, make sure GPU frame dump logging gets output by not sending it to G3D.
Fix git-version-gen.cmd when git.cmd is used.
Add Portuguese (Brazillian) translation.
Merge pull request #863 from m45t3r/master

Add Portuguese (Brazillian) translation.
Fix sceKernelReferThreadProfiler types, implement scePowerGetPllClockFreqFloat
Merge pull request #864 from mikusp/master

Fix types of sceKernelReferThreadProfiler
Ignore cache function 24.
Actually register scePspNpDrm_user
Update native with Windows XP crashfix.

Fixes #861.
Merge pull request #865 from unknownbrackets/win-xp

Fix Windows XP + one more msysgit fix
Approximately rollback the last change to sceKernelReferThreadProfiler
Buildfix, sorry.
Armjit stubs.
Add a double encoding for VCVT. Implement integer divide (but not working yet). Stubs for msub/msubu. Don't detect vfpv3 on Symbian.
Armjit: Add sllv, srlv, srav instructions (reg shift).
Armjit: Implement CLZ instruction. Disable reg shifts for now (breaks Wipeout Pure).
Armjit: Re-enable reg shifts. Thanks [Unknown] for finding the issue.
Armjit: Implement clo as well. Fix up the reg usage in div/divu comment.