msm: clock-8974: Add support for the HDMI PHY PLL

The mdss_extpclk clock is sourced from the HDMI PHY PLL, which
is programmed by the HDMI driver. Add support for this PLL, and
link up the PLL with the exptclk via the set_rate op in the RCG.

Change-Id: I32d31780bab32c4bef92dbe230014030f8dc9a06
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: clock: Remove warned flag

Now that all clock consumers have moved over to using the
clk_prepare/unprepare APIs we can remove the warned flag that
used to indicate that we had already warned about improper usage
of the clock APIs. In particular, we used this flag to avoid
printing warnings for "source" clocks such as PLLs and
crystals that no consumer directly controls but that the clock
driver calls clk_enable() on during clk_set_rate().

Let's use a local variable for clk->dbg_name too because we use
it many times and it makes lines too long.

Change-Id: I0cb3052fd3dec2e46788fbf039ac73f65551e9f9
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: clock: Allow registration of multiple MSM clock tables

If multiple clock drivers wish to use the framework in mach-msm/clock.c,
then it is necessary for additional clock tables to be registered after
msm_clock_init(). Add the msm_clock_register(table, size) API to
accomplish this. Unlike msm_clock_init(), msm_clock_register() can be
used multiple times and called after the kernel has finished booting.

To support debugfs features for clocks registered with the new API,
changes are required to debugfs initialization, which is now done as
part of msm_clock_init() rather than clock_late_init(). A linked list
is used to chain together the tables of clocks so their state can be
printed by clock_debug_print_enabled().

Change-Id: I55f1b804513d5d343f4a4ecf8858577db3759c9c
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: clock: Expose parts of "clock.h" through <mach/clk-provider.h>

Expose the features of "clock.h" outside of mach-msm so that new clock
drivers leveraging the framework in mach-msm/clock.c can be implemented
outside of the mach-msm sub-architecture directory.

Conflicts:

	arch/arm/mach-msm/board-8226.c
	arch/arm/mach-msm/clock-mdss-8974.c

Change-Id: I0dea8c716ed6f81c0296a21dd1d96701dfed5a63
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: clock: Make lock for vdd_class into mutex

There is no reason to hold a spinlock here anymore when the
vdd_class is only updated in non-atomic context. Move to using a
mutex instead. We couldn't do this before because voltage voting
was done in atomic context.

Change-Id: I7cd0469194d9fd57bd6a6ba34ff51a089812b96d
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: clock: Convert clock fmax and vdd class levels from arrays to pointers

Not all clocks can capture their fmax data with an array size of 4. So,
change the fmax entry from an array to a pointer and add a num_fmax field.
This allows each clock to specify fmax data of different length. Also, this
makes fixing up of fmax entries based on SoC id and version a lot easier.

Obviously, if a clock can have more than 4 fmax levels, the vdd class would
also need more than 4 levels. So, update the vdd class code in a similar
fashion.

Conflicts:

	arch/arm/mach-msm/clock-9625.c

Change-Id: I12568dd8fa7c0f8dcfeff68d8ca8de8810445cc7
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: clock-8960: Merge similar gfx3d_clk freq tables

Remove support for 325 MHz in 8960ab and 8064, and replace with
320 MHz. This allows the targets to share the same freq table with
8930.

Change-Id: Ib1d4a850b46683db5ae818eb157abde164c0ca65
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: clock-8960: Add more gfx3d and vcodec frequencies for 8930ab

On 8930ab, gfx3d and vcodec maximum frequencies have been bumped
to 500MHz and 266MHz respectively. Therefore, update PLL15 frequency
to 1000MHz to support gfx3d clock at 500MHz and also update Fmax
values for both gfx3d and vcodec clocks.

Change-Id: I6296a59fcc67b4edc38834009ce9403df2cf2ab6
Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: clock-8960: Add clock initialization support for 8930ab

Clock driver has initialization functions to do some one time
clock configurations e.g. enable/disable clock dynamic gating.
Add this support for 8930ab. Note that the dynamic clock gating
is disabled and will be added once it is verified on 8930ab.

Change-Id: I5f9dbbd1deeb084ca3d58d7be2407ccbb10bc977
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
msm: kgsl: Turn off the CP_DEBUG dynamic clock

The CP dynamic clock seems to be glitchy when the CP clocks are turned
back on after a power event. Turn off said dynamic clock control at
init time. The impact of leaving the dynamic clock control off is
negligible since the CP clock is only on when the CP is actually in
use.

CRs-fixed: 402119
CRs-fixed: 409253
CRs-fixed: 413224
Change-Id: Ic0dedbad783f8b911d9b57d1602d9b3976af1b3b
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
msm: kgsl: Update A330 VBIF settings

Update the VBIF register settings for A330 for better performance and
stability per the latest testing and analysis.

CRs-Fixed: 416680
Change-Id: Ic0dedbad71bfd589b322bed503052315d0bd1940
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
msm: kgsl: Issue conditional interrupts on internal submissions

Waittimestamp calls require interrupts to check if a timestamp
has passed.  The lack of these interrupts was causing waittimestamp
to wait longer than expected since the interrupts were less frequent.
Cause the conditional interrupts to be issued faster by allowing
internal command submissions to issue them.

CRs-fixed: 417577
Change-Id: Idb6f18261b3dd6fcbea5607d449d70ca54136e81
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
msm: kgsl: Set requested power state to NONE after resume

When GPU resumes from suspend requested state is not cleared to NONE.
Due to this idle reporting is not done and GPU stays at MAX freq. As
a fix if the current power state is already ACTIVE and request is
made for active power state then clear the requested state immediately.

CRs-fixed: 424682
Change-Id: I7f0d7fa819308f166cbbbf30b2c20aee73644cfb
Signed-off-by: Vinay Roy <vroy@codeaurora.org>
msm: kgsl: Remove incorrect check for current context

We remove an incorrect check for currently active context.
The intent of the original check was to ensure that the
current context is at least there/valid before we issue
a dummy command with a forced interrupt. However, this
check was implemented incorrectly, instead of checking
the context under which the function is running, the check
was probing the "drawctxt_active" which may not necessarily
be the same as the context for which the function was called.
We fix this by changing the check to instead look for the
context under which the kgsl_check_interrupt_timestamp() has
been called.

CRs-fixed: 426186
Change-Id: I6ac123d16888287b14e6e53028f482eb709f24c5
Signed-off-by: Harsh Vardhan Dwivedi <hdwivedi@codeaurora.org>
msm: kgsl: Disable clock gating earlier during snapshot

Disable clock gating earlier when recording the GPU snapshot.
This will ensure that there are no issues when reading register
values from the GPU hardware.

Change-Id: I173655b419c958f0b8cdfa4609c712e512ff2487
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
msm: kgsl: Disable HLSQ register reads from snapshot

Reading the A3XX HLSQ registers during a GPU hang recovery might cause
the device to hang.  Disable the the HLSQ register reads that would
cause recovery to fail until the failures are better understood.

Change-Id: I1553025fbd824bfacf91f062372d5731cd905cc4
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
msm: kgsl: Add max and min power level controls in sysfs

Add min_pwrlevel, max_pwrlevel and thermal_pwrlevel to give a
privileged user more control over which power levels are considered
during DCVS power management.  max_pwrlevel is the maximum power
level that the system can go to at any time, min_pwrlevel represents
the lowest power level.  DCVS will chose any level between these
two extremes.  thermal_pwrlevel allows a daemon to set an absolute
top for frequency to prevent thermal issues. The effective maximum
power level is considered to be the lower of thermal or max.

Also added is num_pwrlevels that shows the number of active power
levels. This corresponds to the gpu frequencies in
available_gpu_frequencies.

Change-Id: Ic0dedbad20102d9a3c3350055e6fcd10358fc53d
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Always set the active powerlevel when changing clock rates

kgsl_pwrctrl_pwrlevel_change might be called when clocks are on or off.
If clocks are off we don't step the clock rate and the active_pwrlevel
won't be set to the new and correct level.  Set active_pwrlevel to its
new level before doing anything else.

Change-Id: Ic0dedbad84ce1cc1b3b8df97df32e39686b85671
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Use signed integers for power level comparsions

The code that clamped the power levels to the requested minimum and
maximum values was mixing comparison signed and unsigned integers with
predictiably faulty results.  Move all values to signed integers to
handle negative power level numbers correctly

CRs-fixed: 427670
Change-Id: Ic0dedbada6153dc0b109923b376c3aa9a6abbeee
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
iommu/msm: fix the include guard in iommu.h

msm_soc_version_supports_iommu_v1() was defined outside the guard.

Change-Id: I8db106908b08b89e267550d81d031cdb028b92a2
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>