msm_fb: display: delay commit video tile frame size register

Video tile frame size register is NOT double buffered.
when this register updated, it kicks in immediatly.
During transition from smaller resolution to higher
resolution  it may have possibility that mdp still fetch
from smaller resolution buffer with new higher resolution
frame size. This will cause iommu page fault. This patch
delay commit frame size register until next frame update
if it is necessary.

CRs-fixed: 450126, 461598
Change-Id: I0339100b8b2d76adf2b4b4206d1942effae55e0a
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
msm_fb: Fix adb shell start/stop issue when bypass enabled

Currently when 2/3/4 layer bypass is enabled, doing a adb shell
stop/start is failing overlay and composition happens through
GPU. Fix this issue by proper overlay configuration during this
scenario.

Change-Id: Ia04f1839bf80ed552671e48445af63a4dcd6bdfd
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
msm: display: sync point clean up

Remove unused fence input in mdp_display_commit
structure
Use different timeline name for different fb

Change-Id: I4edd335b36dce057ff3e54302af6088a9cc470ec
Signed-off-by: Ken Zhang <kenz@codeaurora.org>

Conflicts:
	drivers/video/msm/msm_fb.c
msm_fb: display: provision of mixer reset function

Mdp has hardware bug which cause fetch engine stalled if less than
3 pixels at begin or end of line be cropped into destination. Reset
mixer can fix this problem. However frame work can provide better
work around solution by falling back to gpu if the condition detected.
This patch will not reset mixer but provide mixer reset function in
case of mixer reset is need in future.

CRs-fixed: 443018
Change-Id: I38ee591f28bf1b81f4fbd58838281b43ba0a8498
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>

Conflicts:
	drivers/video/msm/mdp4.h
	drivers/video/msm/mdp4_util.c

Conflicts:
	drivers/video/msm/mdp4.h
msm_fb: Retain CSC values across suspend/resume sequence

CSC values pertaining to various H/W blocks are stored in a
global structure and will be re-applied during resume sequence.

CRs-Fixed: 376159
Change-Id: Ieb151185efd106041e28feedf4fa271ae4ba2666
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>

Conflicts:
	drivers/video/msm/mdp.h
msm_fb: display: extend mutex protection for mdp pan display

When mdp commits a buffer to play, functions inside pan display, e.g.
mdp4_overlay_mdp_perf_upd are based on the current state of play, so
extending mutex to the scope of pan display to avoid race conditions.

Change-Id: I2e55567fd21de3738be066a2dee298d8122f12a3
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>

Conflicts:
	drivers/video/msm/mdp4_overlay_dsi_cmd.c
	drivers/video/msm/mdp4_overlay_dsi_video.c
	drivers/video/msm/mdp4_overlay_lcdc.c

Conflicts:
	drivers/video/msm/mdp4_overlay_dsi_video.c
	drivers/video/msm/mdp4_overlay_lcdc.c
msm_fb: display: Enable pre-multiplied alpha for MDP303

For images which are pre-multiplied with alpha, driver
support is now added to blend them properly.

CRs-fixed: 347803
Change-Id: I859c26c5f52fa0886c106928ef338bd9d0db4462
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>

Conflicts:
	drivers/video/msm/mdp_ppp_v20.c
msm: display: Reset BG_alpha register while alpha blending

Reset BG_alpha register when pre-multiplied alpha is not
set for a layer during blit request.

CRs-fixed: 351158
Change-Id: If103af384d59c3349cb2ef556a497c709d9280a2
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
msm_fb: Correct the chroma offset calculations for Yamato format

In the PPP blit operations, when the source image format is
Yamato, there is chroma offset calculations going wrong in
the case when a frame is split into parts and blit is done
separately. Correct the chroma offset calculations in this
case.

CRs-fixed: 366908
Change-Id: I867024632fda9f64a569150e0b6389d55614cd3a
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
msm_fb: Fix blending logic for formats with per-pixel alpha

Currently if a layer with per-pixel alpha (eg. RGBA) is fed
for composition with z-order as zero (FG), per-pixel alpha
blending is applied along with the BG frame present on frame
buffer and hence we see the previous frame on the panel. Hence,
apply constant alpha blending if these formats are fed as FG.

CRs-fixed: 405802
CRs-fixed: 435800
Change-Id: I4e00743e7f13189b1830d4d0e655f186ffa590cd
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
msm_fb: Avoid memset of frame buffer during early suspend

At present, we have backlight disabled before frame buffer
early suspend and there is mechanism in place to enable backlight
only after first frame update after display resume. This makes sure
to avoid panel specific artifacts being visible. Hence,
remove memset of frame buffer during suspend. This change
reduces latencies during frame buffer's early suspend.

Change-Id: I4a4d1d28ba10912f24ba38861fdb7086b78192a4
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>

Conflicts:
	drivers/video/msm/msm_fb.c

Conflicts:
	drivers/video/msm/msm_fb.c
msm_fb: display: extend mdp debugfs with force blt enable

Enabling/disabling mixer0 or mixer1 blt mode is a critical way to
debug display issues, so add debugfs interfaces to force blt mode
enabled/disabled with adb shell commands.

CRs-fixed: 390953
Change-Id: I96a568f22398867571a796a863c098f749f5618b
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>

Conflicts:
	drivers/video/msm/mdp4_overlay.c

Conflicts:
	drivers/video/msm/mdp4_overlay.c
Revert "msm_fb: display: Removing extra disable irq in cmds_rx API's"

This reverts commit 24d557ab214ab00a48f02c48fa8a99641f2b97c8.
Revert "msm_fb: display: add wait4videodone for video mode"

This reverts commit 2557c135193a4dd9c446de11eb4ffcf42b17e311.

Conflicts:
	drivers/video/msm/mipi_dsi_host.c
msm: pm-8x60: Save and restore the GIC_CPU_CTRL during power collapse

9615 runs in secure mode and has different QGIC settings. Instead of
writing 0x1, read the GIC_CPU_CTRL register before power-collapse and
restore the value during resume.
This makes sure that power-collapse continues to work on all targets.

Change-Id: I094c4605b89559d777587394ff9f479640459e0a
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
msm: cpuidle: Don't disable irqs again

cpu_idle() disables irqs before calling down into the cpuidle
driver via cpuidle_idle_call(). Disabling irqs again in
msm_cpuidle_enter() is wasteful and unnecessary. It also inhibits
our ability to determine the largest irq latency when the cpu
idles for extended periods of time because the irqsoff trace is
reenabled when the irqs are disabled in msm_cpuidle_enter().

Note that we still reenable irqs before returning, as is required
by the ARM idle loop.

Change-Id: I925478d8fef88ab490959622bc68303f59cc6e79
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: kgsl: initialize kgsl_sync_timeline_ops properly

Signed-off-by: Iliyan Malchev <malchev@google.com>
Add permission checking for binder IPC.

Do not apply permission checks to private files.

Fix security_binder_transfer_binder hook.

Drop the owning task argument to security_binder_transfer_binder
since ref->node->proc can be NULL (dead owner?).
Revise the SELinux checking to apply a single transfer check between
the source and destination tasks.  Owning task is no longer relevant.
Drop the receive permission definition as it is no longer used.

This makes the transfer permission similar to the call permission; it is only
useful if you want to allow a binder IPC between two tasks (call permission)
but deny passing of binder references between them (transfer permission).

Change-Id: I51e7a9a6662e826073b35e4f70a57f9ec73e472e
Signed-off-by: William Roberts <w.roberts@sta.samsung.com>

Conflicts:
	drivers/staging/android/binder.c
	include/linux/security.h
gpu: ion: repurpose flags field for heap_mask and caching

In the latest Ion API, userspace clients specify the heap_mask for an
allocation in the `heap_mask' field of the ion_allocation_data
structure, and they specify caching in the `flags' field. Before, the
heap_mask was in the `flags' field and caching was specified with the
O_DSYNC file open flag.

We would like to support the new API without actually updating Ion. To
do this, | the heap_mask back into the flags field on an allocation
ioctl (since the internal kernel APIs still expect to see it
there). Also make sure that caching is taken from the buffer flags
field rather than the O_DSYNC file flag.

Change-Id: I872afb40d9bf7c49bb31f19c5e9726ac714ef850
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>

Conflicts:
	drivers/gpu/ion/ion.c
msm: ion: Only return Ion flags in ion_handle_get_flags

Since the ion_buffer.flags field is shared between the actual Ion
flags as well as the Ion heap mask, make sure that we're only
returning flags. The heap_mask bits should be masked off.

Change-Id: Ibdaf0ea374b7b80a036bddd11d19c4bafa173ef6
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>