added synthesis strategy that does not use auto fsm extraction
spi_rxfifo_get -> get_spi_rxfifo
fix strategy name
fix the make verilog rule
use clk2 for the 148.5MHz clock for FMC Imageon
remove print empty line in bsvgen
assign lower channel numbers to the indications
added all and exe targets to the generated Makefile
use I2C1 for the Imageon sensor I2c
use FCLK3 for 200MHz clock
Added i2c reset and clock generator controls to Imageon
Added struct type HdmiData