drivers/iio/adc/ad9361: add delay after GPIO reset

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: Set TX REF reset BAR

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: Change clk enable sequence to avoid some surplus updates

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: RF PLL round rate return target

otherwise we might lose some precision twice

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>