Removed the assumption on APIC timer initial Count is all 1s and updated it to handle the long delay that timer initial count.

Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14603 6f19259b-4bc3-4df7-8a09-765794883524
Removed the assumption on APIC timer initial Count is all 1s and updated it to handle the long delay that timer initial count.

Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14604 6f19259b-4bc3-4df7-8a09-765794883524
ShellPkg: Fixed build errors related to variable declarations

- variable "TempLocation" was set but never used

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Jaben Carsey <Jaben.carsey@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14605 6f19259b-4bc3-4df7-8a09-765794883524
SCR_EL3 is the control register for setting the security state
modified the comment which can mislead.

The "ldr r0, [r1]" is overrided with a immediate "mov ro, #3"
instruction. This mov instruction will over write the contents
of the ro register. So replacing 'mov' by 'orr' instruction would
prevent to override the original value.

This patch assumes mov is the right instruction to be retained

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Girish K S <ks.giri@samsung.com>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14606 6f19259b-4bc3-4df7-8a09-765794883524