Remove ABI-duplicated call instruction patterns.

We currently have a duplicated set of call instruction patterns depending
on the ABI to be followed (Darwin vs. Linux).  This is a bit odd; while the
different ABIs will result in different instruction sequences, the actual
instructions themselves ought to be independent of the ABI.  And in fact it
turns out that the only nontrivial difference between the two sets of
patterns is that in the PPC64 Linux ABI, the instruction used for indirect
calls is marked to take X11 as extra input register (which is indeed used
only with that ABI to hold an incoming environment pointer for nested
functions).  However, this does not need to be hard-coded at the .td
pattern level; instead, the C++ code expanding calls can simply add that
use, just like it adds uses for argument registers anyway.

No change in generated code expected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177735 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Fix up test/CodeGen/R600/llvm.pow.ll for r177730

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177736 91177308-0d34-0410-b5e6-96231b3b80d8
fix small doc typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177737 91177308-0d34-0410-b5e6-96231b3b80d8
Refactor out the DIFile parameter to DILexicalBlock to refer to the raw file/directory pair

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177742 91177308-0d34-0410-b5e6-96231b3b80d8
Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177747 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r177675. This is language-specific and shouldn't be in the API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177748 91177308-0d34-0410-b5e6-96231b3b80d8
Don't use the removed API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177749 91177308-0d34-0410-b5e6-96231b3b80d8
Reverted r176374. In some cases the lit.site.cfg file does not get generated in tools/clang/tools/extra.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177751 91177308-0d34-0410-b5e6-96231b3b80d8
reorder the fields in DILexicalBlockFile to match the common prefix for DIScopes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177754 91177308-0d34-0410-b5e6-96231b3b80d8
Swap the DIFile in DILexicalBlockFile out for the raw name/directory pair

This is the last change in transitioning all DIScopes to have a common prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177756 91177308-0d34-0410-b5e6-96231b3b80d8
Add all clauses when merging the landing pads. Duplicates will be handled later on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177757 91177308-0d34-0410-b5e6-96231b3b80d8
Update test. There may be multiple catches, but those will be cleaned up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177758 91177308-0d34-0410-b5e6-96231b3b80d8
Kill every call to @clang.arc.use in the ARC contract phase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177769 91177308-0d34-0410-b5e6-96231b3b80d8
Support in AAEvaluator to print alias queries of loads/stores with TBAA tags.

Add "evaluate-tbaa" to print alias queries of loads/stores. Alias queries
between pointers do not include TBAA tags.

Add testing case for "placement new". TBAA currently says NoAlias.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177772 91177308-0d34-0410-b5e6-96231b3b80d8
Allow the register scavenger to spill multiple registers

This patch lets the register scavenger make use of multiple spill slots in
order to guarantee that it will be able to provide multiple registers
simultaneously.

To support this, the RS's API has changed slightly: setScavengingFrameIndex /
getScavengingFrameIndex have been replaced by addScavengingFrameIndex /
isScavengingFrameIndex / getScavengingFrameIndices.

In forthcoming commits, the PowerPC backend will use this capability in order
to implement the spilling of condition registers, and some special-purpose
registers, without relying on r0 being reserved. In some cases, spilling these
registers requires two GPRs: one for addressing and one to hold the value being
transferred.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177774 91177308-0d34-0410-b5e6-96231b3b80d8
[docs] Document usage of SmallVectorImpl in interfaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177775 91177308-0d34-0410-b5e6-96231b3b80d8
[docs] Slight reword for precision.

The new wording cannot be construed as suggesting the use of
SmallVectorImpl<T> as e.g. a class member (just because the class
happens to be in an interface).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177778 91177308-0d34-0410-b5e6-96231b3b80d8
Fix comparison of mixed signedness

177774 broke the lld-x86_64-darwin11 builder; error:
error: comparison of integers of different signs: 'int' and 'size_type' (aka 'unsigned long')
  for (SI = 0; SI < Scavenged.size(); ++SI)
               ~~ ^ ~~~~~~~~~~~~~~~~

Fix this by making SI also unsigned.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177780 91177308-0d34-0410-b5e6-96231b3b80d8
Changed the method name PtrState.IsKnownIncremented() to PtrState.HasKnownPositiveRefCount().

Now said method matches namewise every other method which refers to
the member KnownPositiveRefCount of the class PtrState.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177816 91177308-0d34-0410-b5e6-96231b3b80d8
Change method name ClearRefCount => ClearKnownPositiveRefCount to match the name of the member that it is modifying.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177818 91177308-0d34-0410-b5e6-96231b3b80d8