[TESTS] Add generic timer for VExpress-A15 basic firmware.

We should be using generic timer in basic firmware for host
having virtualization extension and generic timers.

For now, we only have VExpress-A15 Guest and Virt-v8 Guest
with generic timer but we were not using generic timer for
basic firmware on VExpress-A15 Guest hence this patch.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] Make reset and shutdown board independent

Having arch_board_reset() and arch_board_shutdown() forces
reset and shutdown operations to be board specific which is
not always true because some host might have reset & shutdown
as part of some device or watchdog or timer or GPIO or ...

To make reset and shutdown more flexible we provide APIs for
registering reset and shutdown callbacks.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] vmm_host_irq: Simplify required architecture dependencies

This patch reduces dependency of vmm_host_irq on architecture code.

It does the following changes:
1. Removes ARCH_HOST_IRQ_COUNT instead introduces arch specific
   menuconfig option named CONFIG_HOST_IRQ_COUNT
2. Removed arch_host_irq_active() instead introduced
   vmm_host_irq_set_active_callback() to register a callback
   which can be used by PIC code to provide a function for
   determining current active irq.
3. Removed per board arch_host_irq.h from everywhere

Due to the above change we have reduced lot of duplicate code
from ARM board suppports. We now require only arch_host_irq_init()
from architecture code.

Also, in future this will help us have a generic DTB based board for
wide range or ARM boards.

Signed-off-by: Anup Patel <anup@brainfault.org>
[x86] Move generic mmu code to seperate file.

The generic mmu code can be reused for guest handling
so move that in a seperate file.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Fix atomic operations for x86

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Move common x86 files under common directory.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
Acked-by: Anup Patel <anup@brainfault.org>
[x86] Increase the boot page table size.

Since the VAPOOL moved to 16MB from 8MB, the boot
page tables need to be increased too. Currently this
was the reason of actual machines not coming up with
current Xvisor.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
Acked-by: Anup Patel <anup@brainfault.org>
[x86]  Add support for board reset via keyboard.

We don't enable the ACPI yet on x86 but only parse
the tables. Until that is enabled and tested, the
reset is via the keyboard which toggles the CPU
reset pin. So this is not a board reset per se...

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
Acked-by: Anup Patel <anup@brainfault.org>
[CORE] Generic plugable load balancer

This patch introduces a generic load balancer which in itself
does no load balancing but we can plug vmm_loadbal_algo instances.

The generic load balancer will select best rated vmm_loadbal_algo
instance and use that for doing load balancing.

People can now write their own proprietary or open source load
balancing algorithm and plug this at runtime.

Please note that built-in load balancing algorithm will have to
be GPL because it will be linked directly with Xvisor binary which
is GPL.

Signed-off-by: Anup Patel <anup@brainfault.org>