Don't run internalize if we're outputing bit-code and not an object file.

The problem with running internalize before we're ready to output an object file
is that it may change a 'weak' symbol into an internal one, but that symbol
could be needed by an external object file --- e.g. with arclite.

<rdar://problem/14334895>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185882 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a bug in IRBuilder::ClearInsertionPoint. The IR Builder needs to reset both the BB and the insert point inside the BB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185883 91177308-0d34-0410-b5e6-96231b3b80d8
[objc-arc] Fix assertion in EraseInstruction so that noop on null calls when passed null do not trigger the assert.

The specific case of interest is when objc_retainBlock is passed null.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185885 91177308-0d34-0410-b5e6-96231b3b80d8

This patch changes the saved IRBuilder insert point from BasicBlock::iterator to AssertingVH.

Commit 185883 fixes a bug in the IRBuilder that should fix the ASan bot. AssertingVH can help in exposing some RAUW problems.

Thanks Ben and Alexey!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185886 91177308-0d34-0410-b5e6-96231b3b80d8
Fix comment


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185888 91177308-0d34-0410-b5e6-96231b3b80d8
Revert "DebugInfo: remove unused helper function getDICompositeType."

This reverts commit r185876 as the functions appear to still be used
by dragonegg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185890 91177308-0d34-0410-b5e6-96231b3b80d8
Style fixes: remove unnecessary braces for one-statement if blocks, no else after return, etc. No funcionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185893 91177308-0d34-0410-b5e6-96231b3b80d8
Make BinaryRef output correctly in case of empty data.

Previously, it would simply output nothing, but it should output an
empty string `""`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185894 91177308-0d34-0410-b5e6-96231b3b80d8
X86 fast-isel: Avoid explicit AH subreg reference for [SU]Rem.

Explicit references to %AH for an i8 remainder instruction can lead to
references to %AH in a REX prefixed instruction, which causes things to
blow up. Do the same thing in FastISel as we do for DAG isel and instead
shift %AX right by 8 bits and then extract the 8-bit subreg from that
result.

rdar://14203849
http://llvm.org/bugs/show_bug.cgi?id=16105

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185899 91177308-0d34-0410-b5e6-96231b3b80d8
X86: Add comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185900 91177308-0d34-0410-b5e6-96231b3b80d8
Move some code out of line. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185901 91177308-0d34-0410-b5e6-96231b3b80d8
Remove declare but not implemented methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185904 91177308-0d34-0410-b5e6-96231b3b80d8
Compute the size of an archive member in the constructor.

It is always computed the same way (by parsing the header). Doing it in the
constructor simplifies the callers a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185905 91177308-0d34-0410-b5e6-96231b3b80d8
PPC: Allocate RS spill slot for unaligned i64 load/store

This fixes another bug found by llvm-stress!

If we happen to be doing an i64 load or store into a stack slot that has less
than a 4-byte alignment, then the frame-index elimination may need to use an
indexed load or store instruction (because the offset may not be a multiple of
4, a requirement of the STD/LD instructions). The extra register needed to hold
the offset comes from the register scavenger, and it is possible that the
scavenger will need to use an emergency spill slot. As a result, we need to
make sure that a spill slot is allocated when doing an i64 load/store into a
less-than-4-byte-aligned stack slot.

Because test cases for things like this tend to be fairly fragile, I've
concatenated a few small bugpoint-reduced test cases together to form the
regression test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185907 91177308-0d34-0410-b5e6-96231b3b80d8
InstCombine: add more transforms

C1-X <u C2 -> (X|(C2-1)) == C1
C1-X >u C2 -> (X|C2) == C1
X-C1 <u C2 -> (X & -C2) == C1
X-C1 >u C2 -> (X & ~C2) == C1


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185909 91177308-0d34-0410-b5e6-96231b3b80d8
Commit r185909 was a misapplied patch, fix it


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185910 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Support .llong and fix .word

This adds support for the .llong PowerPC-specifc assembler directive.
In doing so, I notices that .word is currently incorrect: it is
supposed to define a 2-byte data element, not a 4-byte one.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185911 91177308-0d34-0410-b5e6-96231b3b80d8
InstCombine: X & -C != -C -> X <= u ~C

Tests were added in r185910 somehow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185912 91177308-0d34-0410-b5e6-96231b3b80d8
InstCombine: variations on 0xffffffff - x >= 4

The following transforms are valid if -C is a power of 2:
(icmp ugt (xor X, C), ~C) -> (icmp ult X, C)
(icmp ult (xor X, C), -C) -> (icmp uge X, C)

These are nice, they get rid of the xor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185915 91177308-0d34-0410-b5e6-96231b3b80d8
InstCombine: Fix typo in comment for visitICmpInstWithInstAndIntCst


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185916 91177308-0d34-0410-b5e6-96231b3b80d8