usb: gadget: s3c-hsotg: Allow driver instantiation using device tree

This patch adds OF match table to the driver to allow instantiating it
using device tree.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: gadget: s3c-hsotg: enable build for other platforms

Remove unused Samsung-specific machine include and Kconfig
dependency on S3C.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
usb: gadget: s3c-hsotg: add snps,dwc2 compatible string

Enable support for the dwc2 binding.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
usb: gadget: s3c-hsotg: enable generic phy support

Adds support for the generic PHY subsystem. Generic PHY
support is probed and then the driver falls back to checking
for an old style USB PHY and pdata if not found.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>

Conflicts:

	drivers/usb/gadget/s3c-hsotg.c
drivers: phy: add generic PHY framework

The PHY framework provides a set of APIs for the PHY drivers to
create/destroy a PHY and APIs for the PHY users to obtain a reference to the
PHY with or without using phandle. For dt-boot, the PHY drivers should
also register *PHY provider* with the framework.

PHY drivers should create the PHY by passing id and ops like init, exit,
power_on and power_off. This framework is also pm runtime enabled.

The documentation for the generic PHY framework is added in
Documentation/phy.txt and the documentation for dt binding can be found at
Documentation/devicetree/bindings/phy/phy-bindings.txt

Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
FogBugz #167813-1: Switch to use the s3c-hsotg USB driver for peripheral mode

The s3c-hsotg driver is compatible with the Designware dwc2 USB OTG core
that is on SOCFPGA. Switch over to use this driver as it is the mainline
kerne. The s3c-hsotg driver is much more robust and better supported than
the current version.

This patch removes the old dwc2 driver from the repo.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>

Conflicts:

	drivers/staging/dwc2/Kconfig
FogBugz #167813-2: Update the USB DTS entry to use the s3c-hsotg driver

Add a "usb-nop-xceiv" PHY node that is needed to be used with the new
generic PHY driver that is from:

[1790d80: drivers: phy: add generic PHY framework]

Add a clock node for dwc2 usb dts entry, as the s3c-hsotg driver will need
to properly initialize. Remove dts bindings that were used by the old
dwc2 driver.

To enable USB peripheral mode on SOCFPGA, build the kernel with the following
defconfig:

CONFIG_USB_S3C_HSOTG=y

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
FogBugz #169068: Enable generic PHY and configfs in socfpga_defconfig

The USB peripheral driver requires the following defconfig turned on:

CONFIG_USB_PHY=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_GENERIC_PHY=y
CONFIG_CONFIGFS_FS=y

Turn on all of the above in socfpga_defconfig, so when the user needs
USB peripheral mode, only CONFIG_USB_S3C_HSOTG needs to get turned on.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
FogBugz #166487: Support QSPI device DMA on SoCFPGA

Support for DMA transfers was added to the Cadence QSPI driver.
There is a fair amount of new code, but the flow of the driver
was minimally changed.
If the code is unable to initialize DMA channels, it falls
back to non-DMA operation.
Enabling of the DMA transfers is done through the device tree.
Peripheral Request IDs for the QSPI are specified in the device tree.
Device tree documentation was updated.

V2:
Check error return from device_prep_slave_sg
Use #defines for request byte counts
Replaced pr_debug/pr_err with dev_dbg/dev_err

Signed-off-by: Graham Moore <grmoore@altera.com>
FogBugz #166244: Compilation error in spi-dw-pl330.c

Updated calls to device_prep_slave_sg() because the parameter list
had changed since the last time spi-dw-pl330.c was compiled.

Signed-off-by: Graham Moore <grmoore@altera.com>
FogBugz #169263: Correct the parent clock for l3_sp_clk and dbg_clk

The l3_sp_clk's parent should be the l3_mp_clk. This will account for
the extra divider that is present for the l3_mp_clk.

The dbg_clk's parent should be the dbg_at_clk. This will account for
the extra divider that is present for the dbg_at_clk.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
FogBugz #168803: support to configure initial state of bridges

This change adds support to the Altera fpga2sdram and hps2fgpa bridge
drivers for a new optional device tree property, init-val. This property
configures the driver to enable or disable the bridge when instantiated.
If the property does not exist, the driver will leave the bridge in
its current state.

Signed-off-by: Matthew Gerlach <mgerlach@altera.com>
FogBugz #165181: D_CAN stability improvement with 32b accesses

This builds upon the D_CAN patch submitted by Benedikt Spranger
that suggested that D_CAN stability can be improved by using
32 bit accesses. The initial C_CAN driver uses 16 bit accesses
to match the C_CAN hardware. D_CAN has many of the same registers
and bits but the registers are 32 bit to support additional
functionality.
See initial patch and discussion at:
<http://thread.gmane.org/gmane.linux.network/282993/focus=3893>

Improvements in performance include the following:
1) TX and RX statistics are now working.
2) Stability improvements at higher rates.

V2:
- Include the link to the discussion.
- Change double 16b ARB register write to 32 bit write.

Signed-off-by: Thor Thayer <tthayer@altera.com>