cappuccino/execute_ctrl: remove commented code
Add option to insert nop bubble into pipeline

Will be used in longer pipelines with seperate stage
for lsu load/mfspr.
The benefit of squeezing in a nop instruction between
the two instructions over a stall signal is that it is
easier to avoid creating critical paths this way.
cappuccino/rf: hazard resolving for seperate exec/mem/wb stages

Only the wb stage hazard resolving is active at the moment though,
since the writeback is still happening in execute stage.
cappuccino/execute_ctrl: do not flush ctrl/mem stage

But still push out a nop on l.rfe
cappuccino/execute_ctrl: prepare to separate execute/mem/wb stages

Adds registered output signals to the respective states.
Also renames some of the input/outputs to make clear what
stage they belong to.
No real function change at this point.
TODO: Rename this module.
cappuccino/wb_mux: interface preparation for exec/mem/wb separation
cappuccino: Seperate mem and wb stages from execute stage

The purpose of this is to be able to achieve greater fmax,
and to be able to perform one cycle per instructions
for load/stores. The fmax goal has already been achieved,
but some work remains gaining one-cycle load/stores working.

What those changes does, is to move the load/stores and
mfspr/mtspr ops into mem stage (we still call it ctrl though).
Ideally the data cache should be loaded with the lsu address
directly from the alu adder, but that is still creating a
rather long path (due to that the bypass logic in the cache
is purely combinatorial), so for now the lsu address used
is the registered address, causing one extra stall cycle for
load/stores.