svga: use switch statement in svga_shader_type()

Safer in case the PIPE_SHADER_x tokens get renumbered (as Marek
wanted to do).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
svga: pass svga_compile_key by reference instead of value

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
r600g/compute: Move compute_shader_create() function into evergreen_compute.c

Tested-by: Aaron Watry <awatry@gmail.com>
r600g/compute: Accept LDS size from the LLVM backend

And allocate the correct amount before dispatching the kernel.

Tested-by: Aaron Watry <awatry@gmail.com>
mesa: Fix build with older gcc since update of glext.h

Reviewed-by: Brian Paul <brianp@vmware.com>
mesa: Return ZeroVec/dummyReg instead of NULL pointer

Assertions are not sufficient to check for null pointers as they don't
show up in release builds. So, return ZeroVec/dummyReg instead of NULL
pointer in get_{src,dst}_register_pointer(). This should calm down the
warnings from static analysis tool.

Note: This is a candidate for the 9.1 branch.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
r600g: Fix build

Broken since 2840bec56f79347b95dec5458b20d4a46d1aa445 when opencl is
disabled.
radeonsi: rename SI chip class from TAHITI to SI

Covers the entire family.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: initial support for CIK chips

Add the infrastructure to differentiate them.
Just treat them like SI for now.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: initial PM4 changes for CIK

note which packets are removed and add new ones.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: register updates for CIK

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: fix VGT_PRIMITIVE_TYPE emit for CIK

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: emit TA_BC_BASE_ADDR_HI for border color on CIK

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: emit additional shader pgm rsrc registers for CIK

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: properly handle DB tiling setup on CIK

On CIK, DB switches back to using per-surface tiling
parameters rather than the tile index used on SI.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: store chip class in the pm4 struct

Will be used for asic specific pm4 behavior.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: update surface sync packet emit for CIK

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: PA_CL_ENHANCE is privileged on CIK

Needs to be and is set by the kernel.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: emit PA_SC_RASTER_CONFIG[_1] on cik

Use the golden values for each asic.

Todo: update Kabini and Kaveri.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: add llvm processor names for CIK

Requires updated llvm.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>