* generate shorter code on 8-bit and 16-bit CPUs in thlcg2ll.location_force_reg,
  when converting a LOC_JUMP location to a (OS_INT<x<=32)-bit reg location
  (the optimization is similar to r26314, but is for non 64-bit destinations).



git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@26315 3ad0048d-3df7-0310-abae-a5850022a9f2