clk: sunxi: register factors clocks behind composite

This commit reworks factors clock registration to be done behind a
composite clock. This allows us to additionally add a gate, mux or
divisors, as it will be needed by some future PLLs.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
clk: sunxi: add gating support to PLL1

This commit adds gating support to PLL1 on the clock driver. This makes
the PLL1 implementation fully compatible with PLL4 as well.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
ARM: sunxi: add PLL4 support

This commit adds the PLL4 definition to the sun4i, sun5i and sun7i
device trees. PLL4 is compatible with PLL1.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
clk: sunxi: add PLL5 and PLL6 support

This commit implements PLL5 and PLL6 support on the sunxi clock driver.
These PLLs use a similar factor clock, but differ on their outputs.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
ARM: sunxi: add PLL5 and PLL6 support

This commit adds PLL5 and PLL6 nodes to the sun4i, sun5i and sun7i
device trees.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
clk: sunxi: mod0 support

This commit implements support for the "module 0" type of clocks, as
used by MMC, IR, NAND, SATA and other components.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
ARM: sun4i: dt: Add bindings for USB clocks
clk: sunxi: Add support for USB clocks
ARM: sun4i: dt: Add USB EHCI bindings
ARM: sunxi: usb: Add Allwinner sunXi EHCI driver
ARM: sun4i: dt: Add EHCI bindings to the Mele A1000
ARM: sun4i: dt: Add EHCI bindings to Cubieboard-A10
ARM: sun7i: dt: Add bindings for USB clocks
ARM: sun7i: dt: Add USB EHCI bindings
ARM: sun7i: dt: Add USB EHCI bindings for Cubieboard2
ARM: sun7i: dt: Add USB EHCI bindings for A20-Olinuxino
ARM: sun5i: dt: Add bindings for USB Host clocks
clk: sun5i: Add support for USB clocks
ARM: sun5i: dt: Add USB EHCI bindings
ARM: sun5i: dt: Add EHCI bindings to A13-Olinuxino