.gitsubmodules: add general-cores submodule
hdl/Manifest.py: general-cores is fetch as a git submodule now
.gitsubmodules: add dsp-cores submodule
hdl/Manifest.py: add references to ip_cores
hdl/ip_cores/dsp-cores/*: update referenced commit
hdl/platform/virtex6/*: regenerate ip cores
hdl/platform/artix7/*: add artix7 ip cores
hdl/modules/addr_decoder/*: add number of decoding addresses
hdl/modules/fmc_adc_130m_4ch/*: expose chipscope ports
hdl/modules/fmc_adc_250m_4ch/*: expose chipscope ports and small cleanup
hdl/Manifest.py: update top Manifest
hdl/top/ml605/fmc130m/*: new top module with DSP chain
hdl/syn/fmc130m_ml605/*: update syn files
chipscope/fmc130m/*: new chipscope project for ADC data