tcg-aarch64: Allow immediate operands to add and sub

Use signed 25-bit operands, because two 12-bit operations is
smaller than movz+movk+add.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Allow immediate operands to and, or, xor

It isn't obvious how to have the makefile generate bitmask-table.h,
so check it in along with the generator.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Allow immediate operands to compare

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Convert from opcode enums to insn enums

The difference being that INSN_* has been pre-shifted into place.
This should result in less runtime shifting of constants.

The patch could be split into smaller pieces for clarity...

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Support andc, orc, eqv, not

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Handle zero as first argument to sub

In order to properly handle neg, as generated by TCG generic code.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Support movcond

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Support deposit

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Support add2, sub2

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Support div, mulu2

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Improve tcg_out_movi

Handle small positive and negative numbers early.  Check for logical
immediates.  Check if using MOVN for the first set helps.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Avoid add with zero in tlb load

Some guest env are small enough to reach the tlb with only a 12-bit addition.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Use adrp in tcg_out_movi

Loading an qemu pointer as an immediate happens often:

- exit_tb $0x7fa8140013
+ exit_tb $0x7f81ee0013
...
- :  d2800260        mov     x0, #0x13
- :  f2b50280        movk    x0, #0xa814, lsl #16
- :  f2c00fe0        movk    x0, #0x7f, lsl #32
+ :  90ff1000        adrp    x0, 0x7f81ee0000
+ :  91004c00        add     x0, x0, #0x13

Signed-off-by: Richard Henderson <rth@twiddle.net>