SAMA5 OHCI:  Use physical address and flush and/or invalidate data caches as necessary
SAMA5: Fix out of range USB PLL divisor
SAMA5:  Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz
SAMA5:  ports should not be reset state (seems to make no difference)
SAMA5:  Correct the PLL 48MHz divisor.  It was off by a factor of two... no idea why
SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until port is connected
SAMA5 OHCI:  Don't prealloc RH port TDs and EDs.  Allocate from a free list like other cases
STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation.  From Teemu Pirinen
SAMA5 OHCI:  Re-organize some endpoint list data structures.. Strange things happen when semaphores lie in DMA memory which is occasionally invalidated
SAMA5 OHCI:  Driver is now basically functional
Add EHCI header file (not quite complete)
Merge branch 'master' of http://git.code.sf.net/p/nuttx/git into leach
STM32 I2C: Fix reg name for common i2c code