arm: tegra: la: hack latency allowance formula

Remove the ad-hoc scale factor of final latency allowance.
Scale the fifo size to pretend that our FIFO is only as deep
as the lowest fullness we expect to see.

Bug 995270

Change-Id: I78ed2246d2031a2303f81a19fe05c95572a692b0
Signed-off-by: Michael Frydrych <mfrydrych@nvidia.com>
Reviewed-on: http://git-master/r/118816
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Graziano Misuraca <gmisuraca@nvidia.com>
Tested-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

Conflicts:
	arch/arm/mach-tegra/latency_allowance.c