gdb: ignore generated gcore
sim: bfin: add flush/HWERR todo
sim: bfin: drop RET[ENI] setup

Since these insns run in usermode, there should be no need to setup
RET[ENI] to safe values.  They won't be dereferenced, and any insn
that returns via them are valid only in supervisor mode.  Since this
is in the main exception code path, saving any insn at all is good
as it gets multiplied quickly (as in O(n^2) times).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
sim: bfin: add helpful info for generating test tables
sim: bfin: tweak run-tests for parallel usage
	* corelow.c (core_open): Print GDB signal name instead of target
	signal number.
	* cygwinenv.xml: Fix link to FAQ.
	* times.cc (GetSystemTimePreciseAsFileTime): Add comment to declaration.
	(__to_clock_t): Remove a debug_printf.
	(times): Align syscall_printf to debug output of other system calls.
ld/testsuite: Enable ifunc tests on AArch64 big-endian.

ld/testsuite/ChangeLog:

2013-06-17  Will Newton  <will.newton@linaro.org>

	* ld-aarch64/ifunc-1-local.d: Enable test on aarch64_be.
	* ld-aarch64/ifunc-1.d: Likewise.
	* ld-aarch64/ifunc-10.d: Likewise.
	* ld-aarch64/ifunc-11.d: Likewise.
	* ld-aarch64/ifunc-12.d: Likewise.
	* ld-aarch64/ifunc-13.d: Likewise.
	* ld-aarch64/ifunc-14a.d: Likewise.
	* ld-aarch64/ifunc-14b.d: Likewise.
	* ld-aarch64/ifunc-14c.d: Likewise.
	* ld-aarch64/ifunc-14d.d: Likewise.
	* ld-aarch64/ifunc-14e.d: Likewise.
	* ld-aarch64/ifunc-14f.d: Likewise.
	* ld-aarch64/ifunc-15.d: Likewise.
	* ld-aarch64/ifunc-16.d: Likewise.
	* ld-aarch64/ifunc-17a.d: Likewise.
	* ld-aarch64/ifunc-17b.d: Likewise.
	* ld-aarch64/ifunc-18a.d: Likewise.
	* ld-aarch64/ifunc-18b.d: Likewise.
	* ld-aarch64/ifunc-19a.d: Likewise.
	* ld-aarch64/ifunc-19b.d: Likewise.
	* ld-aarch64/ifunc-2-local.d: Likewise.
	* ld-aarch64/ifunc-2.d: Likewise.
	* ld-aarch64/ifunc-20.d: Likewise.
	* ld-aarch64/ifunc-3a.d: Likewise.
	* ld-aarch64/ifunc-3b.d: Likewise.
	* ld-aarch64/ifunc-4.d: Likewise.
	* ld-aarch64/ifunc-4a.d: Likewise.
	* ld-aarch64/ifunc-5a-local.d: Likewise.
	* ld-aarch64/ifunc-5a.d: Likewise.
	* ld-aarch64/ifunc-5b-local.d: Likewise.
	* ld-aarch64/ifunc-5b.d: Likewise.
	* ld-aarch64/ifunc-5r-local.d: Likewise.
	* ld-aarch64/ifunc-6a.d: Likewise.
	* ld-aarch64/ifunc-6b.d: Likewise.
	* ld-aarch64/ifunc-7a.d: Likewise.
	* ld-aarch64/ifunc-7b.d: Likewise.
	* ld-aarch64/ifunc-8.d: Likewise.
	* ld-aarch64/ifunc-9.d: Likewise.
	* ld-ifunc/ifunc.exp: Likewise.
	* fhandler_clipboard.cc (fhandler_dev_clipboard::read): Fix buffer
	read access overrun when pos > 0.
	* Makefile.am (mips-opc.lo): Add rules to create automatic
	dependency files.  Pass archdefs.
	(micromips-opc.lo, mips16-opc.lo): Likewise.
	* Makefile.in: Regenerate.
	* path.cc (cnt_bs): New inline function.
	(symlink_native): Fix creating relative native symlink.
2013-06-17  Catherine Moore  <clm@codesourcery.com>
	    Maciej W. Rozycki  <macro@codesourcery.com>
	    Chao-Ying Fu  <fu@mips.com>

	gas/testsuite/
	* gas/mips/mips.exp: Run new tests.
	* gas/mips/eva.d: New.
	* gas/mips/eva.s: New.
	* gas/mips/micromips@eva.d: New.

	gas/
	* config/tc-mips.c (mips_set_options): Add ase_eva.
	(mips_set_options mips_opts): Add ase_eva.
	(file_ase_eva): Declare.
	(ISA_SUPPORTS_EVA_ASE): Define.
	(IS_SEXT_9BIT_NUM): Define.
	(MIPS_CPU_ASE_EVA): Define.
	(is_opcode_valid): Add support for ase_eva.
	(macro_build): Likewise.
	(macro): Likewise.
	(validate_mips_insn): Likewise.
	(validate_micromips_insn): Likewise.
	(mips_ip): Likewise.
	(options): Add OPTION_EVA and OPTION_NO_EVA.
	(md_longopts): Add -meva and -mno-eva.
	(md_parse_option): Process new options.
	(mips_after_parse_args): Check for valid EVA combinations.
	(s_mipsset): Likewise.

	include/
	* opcode/mips.h (OP_SH_EVAOFFSET): Define.
	(OP_MASK_EVAOFFSET): Define.
	(INSN_ASE_MASK): Delete.
	(ASE_EVA): Define.
	(M_CACHEE_AB, M_CACHEE_OB): New.
	(M_LBE_OB, M_LBE_AB): New.
	(M_LBUE_OB, M_LBUE_AB): New.
	(M_LHE_OB, M_LHE_AB): New.
	(M_LHUE_OB, M_LHUE_AB): New.
	(M_LLE_AB, M_LLE_OB): New.
	(M_LWE_OB, M_LWE_AB): New.
	(M_LWLE_AB, M_LWLE_OB): New.
	(M_LWRE_AB, M_LWRE_OB): New.
	(M_PREFE_AB, M_PREFE_OB): New.
	(M_SCE_AB, M_SCE_OB): New.
	(M_SBE_OB, M_SBE_AB): New.
	(M_SHE_OB, M_SHE_AB): New.
	(M_SWE_OB, M_SWE_AB): New.
	(M_SWLE_AB, M_SWLE_OB): New.
	(M_SWRE_AB, M_SWRE_OB): New.
	(MICROMIPSOP_SH_EVAOFFSET): Define.
	(MICROMIPSOP_MASK_EVAOFFSET): Define.

	opcodes/
	* micromips-opc.c (EVA): Define.
	(TLBINV): Define.
	(micromips_opcodes): Add EVA opcodes.
	* mips-dis.c (mips_arch_choices): Update for ASE_EVA.
	(print_insn_args): Handle EVA offsets.
	(print_insn_micromips): Likewise.
	* mips-opc.c (EVA): Define.
	(TLBINV): Define.
	(mips_builtin_opcodes): Add EVA opcodes.
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