glsl: allow GLSL compiler version to be overridden to 1.50

Although GLSL 1.50 compiler support is not available,
this change will allow MESA_GLSL_VERSION_OVERRIDE=150 to be
used while 1.50 support is being developed.

Since no drivers claim 1.50 GLSL support, this change should
only impact Mesa when MESA_GLSL_VERSION_OVERRIDE=150 is set.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
mesa version: add _mesa_get_gl_version_override

This will allow other code to get access to the override
version before a context is available.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
intel: update max versions based on MESA_GL_VERSION_OVERRIDE

If the override is version is >= 3.1, then update the
max_gl_core_version. Otherwise, update max_gl_compat_version.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
intel: Enable __DRI_API_OPENGL_CORE api with dri2 contexts

Without this set, dri_util.c:dri2CreateContextAttribs
will reject requests to create a context with
__DRI_API_OPENGL_CORE.

This prevents a 3.2 core profile context from being created
even when MESA_GL_OVERRIDE_VERSION=3.2 is used.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
r600g: pad the DMA CS to a multiple of 8 dwords

Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>

NOTE: This is a candidate for the 9.1 branch.
r600g: use async DMA with a non-zero src offset

probably a typo

Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>

NOTE: This is a candidate for the 9.1 branch.
r600g: atomize streamout enabling

This doesn't fix any issue we know of, but there indeed is a week spot
in draw_vbo where streamout can fail. After streamout is enabled,
the need_cs_space call can flush the context, which causes the streamout
to be disabled right after it was enabled and bad things happen.

One way to fix it is to atomize the beginning part, so that no context flush
can happen between streamout enabling and the first drawing.

Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>
r600g: flush and invalidate htile cache when appropriate

Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>

NOTE: This is a candidate for the 9.1 branch.
r600g: unify vgt states

The states were split because we thought it caused a hardlock. Now we know
the hardlock was caused by something else and has since been fixed.

Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>
r600g: cleanup deprecated register tables

These registers are either already emitted elsewhere or moved to start_cs.

Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>
gallium/util: add helper code for 1D integer range

Reviewed-by: Brian Paul <brianp@vmware.com>

v2: cosmetic changes based on Brian's review

Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>

NOTE: This is a candidate for the 9.1 branch. (the next patch depends on it)
r600g: always map uninitialized buffer range as unsynchronized

Any driver can implement this simple and efficient optimization.
Team Fortress 2 hits it always. The DISCARD_RANGE codepath is not even used
with TF2 anymore, so we avoid a ton of useless buffer copies.

Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>

NOTE: This is a candidate for the 9.1 branch.
r600g: don't require dword alignment with CP DMA for buffer transfers

which is a leftover from the days when we used streamout to copy buffers

Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>
r600g: enable CP DMA on 6xx

Tested across several 6xx parts, no piglit regressions.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
i965: Add WARN_ONCE for depthstencil workarounds we shouldn't be hitting.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
intel: Add a flag for miptree mapping to disable transcoding.

I want to reuse intel_miptree_map() to replace some region mapping that's
broken for separate stencil, but doing so would result in new demands on
ETC transcode that we actually don't want to happen.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
intel: Fix software copying of miptree faces for weird formats.

Now that we have W-tiled S8, we can't just region_map and poke at bits --
there has to be some swizzling.  Rely on intel_miptree_map to get that job
done.  This should also get the highest performance path we know of for the
mapping (interesting if I get around to finishing movntdqa some day).

v2: Fix stale name of the bit in a comment.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
i965: Make sRGB-capable framebuffers by default.

The GLX extension lets you expose visuals that explicitly guarantee you
that the GL_FRAMEBUFFER_SRGB_CAPABLE flag will be set, but we can set
the flag even while the visual doesn't provide the guarantee.  This
appears to be consistent with other implementations, as we've seen
several apps now that don't require an srgb visual and assume sRGB will
work without checking the GL_FRAMEBUFFER_SRGB_CAPABLE flag.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55783
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60633
Reviewed-and-tested-by: Ian Romanick <ian.d.romanick@intel.com>
intel: Use the new "ctx" local variable I just added some more.

Reviewed-and-tested-by: Ian Romanick <ian.d.romanick@intel.com>
glapi: add ARB_texture_multisample

Adds new enums, dispatch machinery, and stubs for the 4 new entrypoints.

V2: - Drop placeholder
    - Align enum values
    - Remove explicit exec=mesa; it *is* the dispatch flavor we want,
      but it's also the default. I misunderstood how this worked before;
      after actually reading the generator it makes good sense.

V3: - Squash in stubs for new entrypoints, and dispatch_sanity tweaks,
      so we don't get build breakage between those patches.

V4: - Fix various remaining whitespace issues

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
[1/3 V2] Reviewed-by: Matt Turner <mattst88@gmail.com>
[V3] Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>